公开(公告)号：EP2811516A3

公开(公告)日：2015-04-29

申请号：EP14163757.9

申请日：2014-04-07

申请人： Hamilton Sundstrand Corporation

发明人： Orsini, Luke T. ,  Desantis, Charles V. ,  Lin, Shun-Tien ,  Querns, Kerry R. ,  Trotman, Kenneth J. ,  Perley, David

IPC分类号： H01L23/433 ,  H01L23/40 ,  H05K7/20

CPC分类号： H05K7/20418 ,  G06F1/20 ,  H01L23/40 ,  H01L23/4006 ,  H01L23/433 ,  H01L23/4338 ,  H01L2023/4056 ,  H01L2023/4062 ,  H01L2023/4068 ,  H01L2924/0002 ,  H05K7/20509 ,  Y10T29/49826 ,  Y10T29/49963 ,  H01L2924/00

摘要： An apparatus comprises a thermal block (116) coupled to an electronic device (352), a thermal strap (102) coupled to the thermal block (116), and retention hardware (230) coupled to the thermal strap (102) and configured to retain the thermal block (116) within the thermal strap (102) when the apparatus is exposed to at least one variable environmental condition.

公开(公告)号：EP2244543B1

公开(公告)日：2015-03-04

申请号：EP10250793.6

申请日：2010-04-20

申请人： Hamilton Sundstrand Corporation

发明人： DiVincenzo, Gregory ,  Hartman, Jay H. ,  Kamenetz, Jeffry K. ,  Orsini, Luke T.

IPC分类号： H05K5/02

CPC分类号： H05K5/0247 ,  Y10T29/49002

公开(公告)号：EP2475005A3

公开(公告)日：2014-03-26

申请号：EP11196213.0

申请日：2011-12-30

申请人： Hamilton Sundstrand Corporation

发明人： Roy, Kevin P. ,  Poisson, Richard A. ,  Kokas, Jay W. ,  Marotta, Edward John ,  Hoeckele, Robert C. ,  Orsini, Luke T. ,  McCloud, Marc S. ,  Fitzpatrick, Matthew S.

IPC分类号： H01L23/62 ,  H01L23/495 ,  H01L23/16 ,  H01L23/31 ,  H01L21/56 ,  H01L23/49

CPC分类号： H01L23/49562 ,  H01L21/561 ,  H01L23/16 ,  H01L23/3107 ,  H01L23/49575 ,  H01L23/62 ,  H01L24/48 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A system (10) comprises a package (12) with top (22) and bottom (24) surfaces, a plurality of high-power transient voltage suppressors (15) arranged within the package, and a robust lead frame (16). Each of the transient voltage suppressors (15) has first and second major surfaces substantially perpendicular to the top (22) and bottom surfaces (24) of the package. The lead frame (16) comprises leads (18A,18B) connected to the major surfaces of the transient voltage suppressors. Each of the leads has a thickness greater than about 0.015 inches (0.381 mm) in a mounting portion (36), in order to dissipate heat from the transient voltage suppressors (15) and to resist vibration-induced stress on the package.

公开(公告)号：EP2244543A2

公开(公告)日：2010-10-27

申请号：EP10250793.6

申请日：2010-04-20

申请人： Hamilton Sundstrand Corporation

发明人： DiVincenzo, Gregory ,  Hartman, Jay H. ,  Kamenetz, Jeffry K. ,  Orsini, Luke T.

IPC分类号： H05K5/00 ,  H05K5/03 ,  H05K5/04 ,  H05K5/06 ,  B60R16/023 ,  B64D33/00

CPC分类号： H05K5/0247 ,  Y10T29/49002

摘要： A Full Authority Digital Electronic Controller (FADEC) has a stamped housing body (110), a FADEC circuit assembly (210) within the housing body, and a cover (120). An electrical connector (140) is mounted to the housing body.

摘要翻译： 完整机构数字电子控制器（FADEC）具有冲压的壳体（110），壳体内的FADEC电路组件（210）和盖（120）。 电连接器（140）安装到壳体上。

公开(公告)号：EP2811516B1

公开(公告)日：2017-10-25

申请号：EP14163757.9

申请日：2014-04-07

申请人： Hamilton Sundstrand Corporation

发明人： Orsini, Luke T. ,  Desantis, Charles V. ,  Lin, Shun-Tien ,  Querns, Kerry R. ,  Trotman, Kenneth J. ,  Perley, David

IPC分类号： H01L23/433 ,  H01L23/40 ,  H05K7/20 ,  G06F1/20

CPC分类号： H05K7/20418 ,  G06F1/20 ,  H01L23/40 ,  H01L23/4006 ,  H01L23/433 ,  H01L23/4338 ,  H01L2023/4056 ,  H01L2023/4062 ,  H01L2023/4068 ,  H01L2924/0002 ,  H05K7/20509 ,  Y10T29/49826 ,  Y10T29/49963 ,  H01L2924/00

公开(公告)号：EP2811516A2

公开(公告)日：2014-12-10

申请号：EP14163757.9

申请日：2014-04-07

申请人： Hamilton Sundstrand Corporation

发明人： Orsini, Luke T. ,  Desantis, Charles V. ,  Lin, Shun-Tien ,  Querns, Kerry R. ,  Trotman, Kenneth J. ,  Perley, David

IPC分类号： H01L23/433

CPC分类号： H05K7/20418 ,  G06F1/20 ,  H01L23/40 ,  H01L23/4006 ,  H01L23/433 ,  H01L23/4338 ,  H01L2023/4056 ,  H01L2023/4062 ,  H01L2023/4068 ,  H01L2924/0002 ,  H05K7/20509 ,  Y10T29/49826 ,  Y10T29/49963 ,  H01L2924/00

摘要： An apparatus comprises a thermal block (116) coupled to an electronic device (352), a thermal strap (102) coupled to the thermal block (116), and retention hardware (230) coupled to the thermal strap (102) and configured to retain the thermal block (116) within the thermal strap (102) when the apparatus is exposed to at least one variable environmental condition.

摘要翻译： 一种设备包括耦合到电子设备（352）的热块（116），耦合到热块（116）的热带（102）和耦合到热带（102）的保持硬件（230），并且被配置为 当设备暴露于至少一个可变环境条件时，将热块（116）保持在热带（102）内。

公开(公告)号：EP2244543A3

公开(公告)日：2013-10-09

申请号：EP10250793.6

申请日：2010-04-20

申请人： Hamilton Sundstrand Corporation

发明人： DiVincenzo, Gregory ,  Hartman, Jay H. ,  Kamenetz, Jeffry K. ,  Orsini, Luke T.

IPC分类号： H05K5/00 ,  H05K5/02 ,  B60R16/023 ,  B64D33/00

CPC分类号： H05K5/0247 ,  Y10T29/49002

摘要： A Full Authority Digital Electronic Controller (FADEC) has a stamped housing body (110), a FADEC circuit assembly (210) within the housing body, and a cover (120). An electrical connector (140) is mounted to the housing body.

公开(公告)号：EP2495659B1

公开(公告)日：2013-05-29

申请号：EP12169884.9

申请日：2010-10-11

申请人： Hamilton Sundstrand Corporation

发明人： Kamenetz, Jeffry K. ,  DiVincenzo, Gregory ,  Johnston, Mark A. ,  Kokas, Jay W. ,  Orsini, Luke T. ,  Fischer, Steven R ,  Hartman, Jay H. ,  Roy, Kevin P. ,  Betterini, William

IPC分类号： G06F11/20 ,  G06F11/07

CPC分类号： G06F11/0796 ,  G05B19/0428 ,  G05B2219/25471 ,  G06F11/2028

摘要： An electronic control configuration (10a) includes at least one secondary microprocessor (32a, 32b) operable to control a device (12). The at least one secondary microprocessor (32a, 32b) assumes protection control of the device responsive to a first type of failure by transmitting a protection control signal to a first effector (18). The at least one secondary microprocessor (32a, 32b) assumes backup control of the device responsive to a second type of failure by transmitting a backup control signal to a second effector (16). The backup control functionality of the at least one secondary microprocessor (32a, 32b) can be selectively disabled.

公开(公告)号：EP2495659A1

公开(公告)日：2012-09-05

申请号：EP12169884.9

申请日：2010-10-11

申请人： Hamilton Sundstrand Corporation

发明人： Kamenetz, Jeffry K. ,  DiVincenzo, Gregory ,  Johnston, Mark A. ,  Kokas, Jay W. ,  Orsini, Luke T. ,  Fischer, Steven R ,  Hartman, Jay H. ,  Roy, Kevin P. ,  Betterini, William

IPC分类号： G06F11/20 ,  G06F11/07

CPC分类号： G06F11/0796 ,  G05B19/0428 ,  G05B2219/25471 ,  G06F11/2028

摘要： An electronic control configuration (10a) includes at least one secondary microprocessor (32a, 32b) operable to control a device (12). The at least one secondary microprocessor (32a, 32b) assumes protection control of the device responsive to a first type of failure by transmitting a protection control signal to a first effector (18). The at least one secondary microprocessor (32a, 32b) assumes backup control of the device responsive to a second type of failure by transmitting a backup control signal to a second effector (16). The backup control functionality of the at least one secondary microprocessor (32a, 32b) can be selectively disabled.

摘要翻译： 电子控制配置（10a）包括可操作以控制设备（12）的至少一个二次微处理器（32a，32b）。 所述至少一个次级微处理器（32a，32b）通过将保护控制信号发送到第一执行器（18）而对第一类型的故障作出对该装置的保护控制。 所述至少一个次级微处理器（32a，32b）通过将备用控制信号发送到第二执行器（16）来对所述设备进行备用控制以响应第二类型的故障。 可以选择性地禁用至少一个次级微处理器（32a，32b）的备用控制功能。

公开(公告)号：EP2475005A2

公开(公告)日：2012-07-11

申请号：EP11196213.0

申请日：2011-12-30

申请人： Hamilton Sundstrand Corporation

发明人： Roy, Kevin P. ,  Poisson, Richard A. ,  Kokas, Jay W. ,  Marotta, Edward John ,  Hoeckele, Robert C. ,  Orsini, Luke T. ,  McCloud, Marc S. ,  Fitzpatrick, Matthew S.

IPC分类号： H01L23/62 ,  H01L23/495

CPC分类号： H01L23/49562 ,  H01L21/561 ,  H01L23/16 ,  H01L23/3107 ,  H01L23/49575 ,  H01L23/62 ,  H01L24/48 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A system (10) comprises a package (12) with top (22) and bottom (24) surfaces, a plurality of high-power transient voltage suppressors (15) arranged within the package, and a robust lead frame (16). Each of the transient voltage suppressors (15) has first and second major surfaces substantially perpendicular to the top (22) and bottom surfaces (24) of the package. The lead frame (16) comprises leads (18A,18B) connected to the major surfaces of the transient voltage suppressors. Each of the leads has a thickness greater than about 0.015 inches (0.381 mm) in a mounting portion (36), in order to dissipate heat from the transient voltage suppressors (15) and to resist vibration-induced stress on the package.

摘要翻译： 系统（10）包括具有顶部（22）和底部（24）表面的封装（12），布置在封装内的多个高功率瞬态电压抑制器（15）和坚固的引线框架（16）。 每个瞬态电压抑制器（15）具有基本上垂直于封装的顶部（22）和底部表面（24）的第一和第二主表面。 引线框架（16）包括连接到瞬态电压抑制器的主表面的引线（18A，18B）。 每个引线在安装部分（36）中具有大于约0.015英寸（0.381mm）的厚度，以便从瞬态电压抑制器（15）散发热量并抵抗封装件上的振动引起的应力。