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公开(公告)号：EP4325581A1
公开(公告)日：2024-02-21
申请号：EP21944601.0
申请日：2021-06-11
发明人： TANG, Gaofei , BAO, Qilong , WANG, Hanxing , JIANG, Qimeng , OUYANG, Dongfa
摘要： An integrated device, a semiconductor device, and an integrated device manufacturing method are provided, to improve capacitor integration density of the integrated device. The integrated device in embodiments of this application includes: A first dielectric layer is disposed on a first metal layer; the first metal layer, the first dielectric layer, and a gate metal layer on the first dielectric layer form a first capacitor; the gate metal layer, a second dielectric layer on the gate metal layer, and a second metal layer on the second dielectric layer form a second capacitor; and the first metal layer is connected to the second metal layer through a first conductor structure, so that the first capacitor and the second capacitor are connected in parallel.
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公开(公告)号：EP4336562A1
公开(公告)日：2024-03-13
申请号：EP21955322.9
申请日：2021-08-30
发明人： TANG, Gaofei , UEDA, Daisuke , SUN, Hui , BAO, Qilong , WANG, Hanxing
IPC分类号： H01L29/778 , H01L29/423
摘要： Embodiments of this application disclose a gallium nitride component, a method for manufacturing a gallium nitride component, and an electronic device. The gallium nitride component may include a gallium nitride layer, a barrier layer on a surface of a side of the gallium nitride layer, and a gate on a side that is of the barrier layer and that is away from the gallium nitride layer. The gallium nitride layer has a gate region and a non-gate region outside the gate region. Elements of a constituent material of the barrier layer include aluminum (Al), gallium (Ga), and nitrogen (N). The barrier layer is located in the gate region and the non-gate region. In a direction perpendicular to the surface of the gallium nitride layer, a size of the barrier layer located in the gate region is greater than a size of the barrier layer located in the non-gate region, and aluminum concentration on a side that is of the barrier layer located in the gate region and that faces the gallium nitride layer is greater than aluminum concentration on a side that is of the barrier layer located in the gate region and that faces the gate. In this way, the aluminum concentration in the barrier layer decreases in a direction of the gate region away from the gallium nitride layer, and based on a polarization effect, the barrier layer can be naturally equivalent to p-type doping without Mg doping, so that electrons at an AlGaN/GaN interface in the gate region can be naturally exhausted, and a two-dimensional electron gas channel in the non-gate region is not exhausted. In addition, when a normally-closed gallium nitride component is formed, a defect state is not formed in the barrier layer in the non-gate region due to the Mg doping. Therefore, a risk of dynamic resistance degradation and resistance degradation after HTOL of the component is reduced, and the gallium nitride component with excellent performance is obtained.
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公开(公告)号：EP4300587A1
公开(公告)日：2024-01-03
申请号：EP22766220.2
申请日：2022-03-03
发明人： BAO, Qilong , JIANG, Qimeng , TANG, Gaofei , WANG, Hanxing , CURATOLA, Gilberto
IPC分类号： H01L29/06 , H01L29/20 , H01L21/335
摘要： This application provides a field effect transistor, a method for preparing the field effect transistor, and a switch circuit. The field effect transistor includes a channel layer, a source, a drain, a gate structure, and a gate metal layer; and the gate structure includes a P-type gallium nitride layer and an N-type gallium nitride layer that are disposed in a stacking manner, so that a gate metal/pGaN Schottky diode is replaced with an nGaN/pGaN reverse bias diode, to improve a gate voltage-withstand capability of the field effect transistor, thereby improving a breakdown capability of the field effect transistor. A doping density of the P-type gallium nitride layer is between 1 × 10 18 cm -3 and 1 x 10 19 cm -3 , so that a charge storage effect during operation of a device can be reduced, carriers at the pGaN layer can be exhausted as much as possible, and redundant-charge storage is avoided, thereby improving operating threshold voltage stability of the device. The gate metal layer is in ohmic contact with the gate structure, so that reliability of a connection between the gate metal layer and the gate structure can be improved, thereby improving reliability of the field effect transistor.
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公开(公告)号：EP4272254A1
公开(公告)日：2023-11-08
申请号：EP21928586.3
申请日：2021-03-05
发明人： CURATOLA, Gilberto , BAO, Qilong , JIANG, Qimeng , TANG, Gaofei , WANG, Hanxing
IPC分类号： H01L29/778
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