公开(公告)号：EP1226501A4

公开(公告)日：2003-10-01

申请号：EP00959158

申请日：2000-08-24

Applicant: IBM

Inventor： BASS BRIAN MITCHELL ,  CALVIGNAC JEAN LOUIS ,  GALLO ANTHONY MATTEO ,  HEDDES MARCO C ,  RAO SRIDHAR ,  SIEGEL MICHAEL STEVEN ,  YOUNGMAN BRIAN ALAN ,  VERPLANKEN FABRICE JEAN

IPC: G06F15/16 ,  G06F13/40 ,  G06F15/177 ,  H04L12/56 ,  G06F13/00 ,  G06F13/38 ,  G06F15/00 ,  G06F15/173 ,  G06F15/76

CPC classification number: H04L49/3036 ,  G06F13/4022 ,  H04L49/15 ,  H04L49/205 ,  H04L49/3009 ,  H04L49/351

Abstract: A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation of a control point and a plurality of interface processors formed on a semiconductor substrate. The control point and interface processors together form a network processor capable of cooperating with other elements including an optional switching fabric device in executing instructions directing the flow of data in a network.

公开(公告)号：EP1208676A4

公开(公告)日：2008-02-27

申请号：EP00959159

申请日：2000-08-24

Applicant: IBM

Inventor： ALLEN JAMES JR ,  BASS BRIAN MITCHELL ,  CALVIGNAC JEAN LOUIS ,  GAUR SANTOSH PRASAD ,  HEDDES MARCO C ,  SIEGEL MICHAEL STEVEN ,  VERPLANKEN FABRICE JEAN

IPC: G06F15/16 ,  G06F15/177 ,  H04L12/56 ,  H04Q3/00 ,  H04Q3/545 ,  H04J3/24 ,  H04Q11/04

CPC classification number: H04Q3/002 ,  H04L45/742 ,  H04L49/254 ,  H04L49/351 ,  H04L49/354 ,  H04L49/602 ,  H04L2212/00 ,  H04Q3/5455 ,  H04Q2213/1302 ,  H04Q2213/13034 ,  H04Q2213/1304 ,  H04Q2213/13103 ,  H04Q2213/13104 ,  H04Q2213/13106 ,  H04Q2213/13107 ,  H04Q2213/13322

Abstract: A network switching apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation among a plurality of interface processors (12) and a suite of peripheral elements formed on a semiconductor substrate (10). The interface processors (12) and peripherals together form a network processor capable of cooperating with other elements including an optional switch fabric device in executing instructions directing the flow of data in the network.

公开(公告)号：EP1222517A4

公开(公告)日：2007-03-21

申请号：EP00957270

申请日：2000-08-24

Applicant: IBM

Inventor： BARKER KENNETH JAMES ,  BASS BRIAN MITCHELL ,  CALVIGNAC JEAN-LOUIS ,  HEDDES MARCO C ,  SIEGEL MICHAEL STEVEN ,  TROMBLEY MICHAEL RAYMOND ,  VERPLANKEN FABRICE JEAN

IPC: H04L29/06 ,  H04L12/56

CPC classification number: H04L29/06 ,  H04L49/1507 ,  H04L49/45 ,  H04L69/12

Abstract: A network processor (10) useful in network switch apparatus and methods of operating such a processor (10) in which data flow handling and flexibility is enhanced by the cooperation of a plurality of interface processors (16, 34) formed on a semiconductor substrate. The interface processors (16, 34) provide data paths for inbound and outbound data flow and operate under the control of instructions stored in an instruction store formed on the semiconductor substrate.

公开(公告)号：EP1226509A4

公开(公告)日：2007-09-26

申请号：EP00957269

申请日：2000-08-24

Applicant: IBM

Inventor： BASS BRIAN MITCHELL ,  CALVIGNAC JEAN-LOUIS ,  GALLO ANTHONY MATTEO ,  HEDDES MARCO C ,  LEAVENS ROSS BOYD ,  PATEL PIYUSH CHUNILAL ,  RINALDI MARK ANTHONY ,  SIEGEL MICHAEL STEVEN ,  VERPLANKEN FABRICE JEAN

IPC: G06F15/16 ,  G06F15/80 ,  H04L12/56 ,  G06F15/00

CPC classification number: H04L49/602 ,  G06F15/80 ,  H04L49/351

Abstract: A network processor (10) useful in network switch apparatus and methods of operating such a processor in which data flow handling and flexibility is enhanced by the cooperation of an embedded processor complex (12) with a suite of peripherals (14-36 and 40), all formed on a common semiconductor substrate. The interface processors (16, 34) provide data path for inbound and outbound data flow and operate under the control of instructions stored in an instruction store formed on the semiconductor substrate, while storage of transiting data flow portions is provided by memory peripherals and interfaces to external memory elements.

公开(公告)号：EP1208447A4

公开(公告)日：2004-10-20

申请号：EP00959157

申请日：2000-08-24

Applicant: IBM

Inventor： BASS BRIAN MITCHELL ,  CALVIGNAC JEAN LOUIS ,  HEDDES MARCO C ,  PATEL PIYUSH CHUNILAL ,  REVILLA JUAN GUILLERMO ,  SIEGEL MICHAEL STEVEN ,  VERPLANKEN FABRICE JEAN

IPC: G06F15/167 ,  G06F12/06 ,  G06F15/177 ,  H04L12/56 ,  H04Q11/04 ,  G06F15/16 ,  G06F12/00 ,  G06F13/16

CPC classification number: H04Q11/0478 ,  H04L2012/5681

Abstract: A network switch apparatus (10), components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation of a plurality of memory elements and a plurality of interface processors formed on a semiconductor substrate (10). The memory elements and interface processors together form a network processor (10) capable of cooperating with other elements in executing instructions directing the flow of data in a network. Access to the memory elements is controlled in a particular manner and under operative rules which provide controlled multiple accesses of the plurality of memory elements by a plurality of processors.