公开(公告)号：EP1072066A4

公开(公告)日：2002-01-09

申请号：EP99912295

申请日：1999-03-04

申请人： INTEL CORP

发明人： HART FRANK P ,  NAGARAJ RAVIPRAKASH ,  TURNER LEONARD O ,  SPURRELL ARTHUR L

IPC分类号： H01R12/50 ,  H01R12/83 ,  H01R4/66 ,  H01R12/22

CPC分类号： H01R12/83 ,  H01R13/658

摘要： The present invention is a memory bus connector for accommodating a memory module that is parallel to a motherboard. The memory bus connector of the present invention has a plurality of individual contacts that act as data signal contacts and/or ground members that connect to the lower portion the parallel memory module. The memory bus connector of the present invention also has a sheet grounding member that connects to the upper portion of the memory module.

摘要翻译： 本发明是一种用于容纳与主板平行的存储器模块的存储器总线连接器。 本发明的存储器总线连接器具有用作数据信号触点的多个单独触点和/或连接到并行存储器模块下部的接地构件。 本发明的存储器总线连接器还具有连接到存储器模块的上部的片接地构件。