公开(公告)号：EP3614261A1

公开(公告)日：2020-02-26

申请号：EP19182456.4

申请日：2019-06-25

申请人： INTEL Corporation

发明人： JANI, Nrupal ,  DEVAL, Manasi ,  JAIN, Anjali Singhai ,  SARANGAM, Parthasarathy ,  AGGARWAL, Mitu ,  PARIKH, Neerav ,  DUYCK, Alexander H. ,  PATIL, Kiran ,  SANKARAN, Rajesh M. ,  KUMAR, Sanjay K. ,  KAKAIYA, Utkarsh Y. ,  LANTZ, Philip ,  TIAN, Kun

IPC分类号： G06F9/445 ,  G06F9/455

摘要： Examples may include a method of instantiating a virtual machine; instantiating a virtual device to transmit data to and receive data from assigned resources of a shared physical device by receiving input data requesting assigned resources for the virtual device, allocating assigned resources to the virtual device based at least in part on the input data, and mapping a page location in an address space of the shared physical device for a selected one of the assigned resources to a page location in a memory-mapped input/output (MMIO) space of the virtual device; and assigning the virtual device to the virtual machine, the virtual machine to transmit data to and receive data from the physical device via the MMIO space of the virtual device.

公开(公告)号：EP3771988A1

公开(公告)日：2021-02-03

申请号：EP20165698.0

申请日：2020-03-25

申请人： INTEL Corporation

发明人： GANGULI, Mrittika ,  PARIKH, Neerav ,  SHARP, Robert ,  SEN, Sujoy

IPC分类号： G06F15/173 ,  H04L29/08 ,  G06F9/455 ,  H04L12/863 ,  H04L12/851

摘要： Technologies for remote direct memory access (RDMA) queue pair quality of service (QoS) management are disclosed. In the illustrative embodiment, several queue pairs associated with a virtual machine on a compute sled may be created in a network interface controller of the compute sled. A QoS parameter such as a class of service identifier or a weighting may be assigned to each queue pair such that each queue pair has a different available bandwidth. The compute sled may also predict future RDMA queue pair bandwidth usage and adjust RDMA queue pair bandwidth allocation based on the prediction.

公开(公告)号：EP3314448B1

公开(公告)日：2020-08-12

申请号：EP16815018.3

申请日：2016-06-02

申请人： Intel Corporation

发明人： JANI, Nrupal ,  KUMAR, Dinesh ,  MACIOCCO, Christian ,  WANG, Ren ,  PARIKH, Neerav ,  FASTABEND, John ,  GASPARAKIS, Iosif ,  HARRIMAN, David J. ,  CONNOR, Patrick L. ,  JAIN, Sanjeev

IPC分类号： G06F13/40 ,  H04L12/933 ,  H04L12/931 ,  H04L12/725 ,  H04L12/26 ,  H04L12/803 ,  H04L12/911

公开(公告)号：EP3314448A1

公开(公告)日：2018-05-02

申请号：EP16815018.3

申请日：2016-06-02

申请人： Intel Corporation

发明人： JANI, Nrupal ,  KUMAR, Dinesh ,  MACIOCCO, Christian ,  WANG, Ren ,  PARIKH, Neerav ,  FASTABEND, John ,  GASPARAKIS, Iosif ,  HARRIMAN, David J. ,  CONNOR, Patrick L. ,  JAIN, Sanjeev

IPC分类号： G06F13/40 ,  H04L12/933 ,  H04L12/931

CPC分类号： H04L45/44 ,  H04L43/026 ,  H04L43/0817 ,  H04L43/0876 ,  H04L43/16 ,  H04L45/306 ,  H04L47/125 ,  H04L47/781

摘要： Devices and techniques for hardware accelerated packet processing are described herein. A device can communicate with one or more hardware switches. The device can detect characteristics of a plurality of packet streams. The device may distribute the plurality of packet streams between the one or more hardware switches and software data plane components based on the detected characteristics of the plurality of packet streams, such that at least one packet stream is designated to be processed by the one or more hardware switches. Other embodiments are also described.