公开(公告)号：EP4405824A1

公开(公告)日：2024-07-31

申请号：EP22873388.7

申请日：2022-08-23

申请人： Intel Corporation

发明人： KAKAIYA, Utkarsh Y. ,  GOPAL, Vinodh

IPC分类号： G06F15/16 ,  G06F15/76

CPC分类号： G06F9/3877 ,  G06F9/3009 ,  G06F9/4881 ,  G06F9/5027 ,  G06F2209/50920130101 ,  G06F9/544

公开(公告)号：EP4359928A1

公开(公告)日：2024-05-01

申请号：EP22828928.6

申请日：2022-03-16

申请人： Intel Corporation

发明人： KAKAIYA, Utkarsh Y. ,  SANKARAN, Rajesh M.

IPC分类号： G06F9/48 ,  G06F9/50 ,  G06F9/455 ,  G06F11/34 ,  G06F13/42

CPC分类号： G06F2209/50920130101 ,  G06F2209/502220130101 ,  G06F9/4887 ,  G06F9/5027 ,  G06F2209/50420130101 ,  G06F2209/50320130101

公开(公告)号：EP3929735A1

公开(公告)日：2021-12-29

申请号：EP20212490.5

申请日：2020-12-08

申请人： INTEL Corporation

发明人： KAKAIYA, Utkarsh Y. ,  KUMAR, Sanjay K. ,  LANTZ, Philip ,  NEIGER, Gilbert ,  SANKARAN, Rajesh ,  SHANBHOGUE, Vedvyas

IPC分类号： G06F9/30 ,  G06F9/52 ,  G06F9/50 ,  G06F3/06 ,  G06F13/20

摘要： In one embodiment, a processor comprises: a first configuration register to store quality of service (QoS) information for a process address space identifier (PASID) value associated with a first process; and an execution circuit coupled to the first configuration register, where the execution circuit, in response to a first instruction, is to obtain command data from a first location identified in a source operand of the first instruction, insert the QoS information and the PASID value into the command data, and send a request comprising the command data to a device coupled to the processor, to enable the device to use the QoS information of a plurality of requests to manage sharing between a plurality of processes. Other embodiments are described and claimed.

公开(公告)号：EP4322006A1

公开(公告)日：2024-02-14

申请号：EP23191363.3

申请日：2023-08-14

申请人： Intel Corporation

发明人： SANKARAN, Rajesh M. ,  LANTZ, Philip R. ,  JOSHI, Dhananjay A. ,  RANGANATHAN, Narayan ,  KHOR, Hai Ming ,  KUMAR, Sanjay ,  RAO, Nikhil ,  GAYEN, Saurabh ,  KAKAIYA, Utkarsh Y.

IPC分类号： G06F9/54 ,  G06F13/16 ,  G06F13/40

摘要： Methods and apparatus relating to data streaming accelerators are described. In an embodiment, a hardware accelerator such as a Data Streaming Accelerator (DSA) logic circuitry performs data movement and/or data transformation for data to be transferred between a processor (having one or more processor cores) and a storage device. Other embodiments are also disclosed and claimed.

公开(公告)号：EP4242893A3

公开(公告)日：2023-11-29

申请号：EP23156058.2

申请日：2023-02-10

申请人： INTEL Corporation

发明人： KAKAIYA, Utkarsh Y. ,  GAYEN, Saurabh ,  SOOD, Kapil ,  LAKKAKULA, Naveen

IPC分类号： G06F21/53 ,  G06F21/74

摘要： Methods and apparatus relating to confidential computing extensions for highly scalable accelerators are described. One or more embodiments provide extensions for scalable accelerator(s) to be able to directly assign accelerator work-queue(s) to Trusted Execution Environment (TEE) Virtual Machines (TVMs). Other embodiments are also disclosed and claimed.

公开(公告)号：EP3614261A1

公开(公告)日：2020-02-26

申请号：EP19182456.4

申请日：2019-06-25

申请人： INTEL Corporation

发明人： JANI, Nrupal ,  DEVAL, Manasi ,  JAIN, Anjali Singhai ,  SARANGAM, Parthasarathy ,  AGGARWAL, Mitu ,  PARIKH, Neerav ,  DUYCK, Alexander H. ,  PATIL, Kiran ,  SANKARAN, Rajesh M. ,  KUMAR, Sanjay K. ,  KAKAIYA, Utkarsh Y. ,  LANTZ, Philip ,  TIAN, Kun

IPC分类号： G06F9/445 ,  G06F9/455

摘要： Examples may include a method of instantiating a virtual machine; instantiating a virtual device to transmit data to and receive data from assigned resources of a shared physical device by receiving input data requesting assigned resources for the virtual device, allocating assigned resources to the virtual device based at least in part on the input data, and mapping a page location in an address space of the shared physical device for a selected one of the assigned resources to a page location in a memory-mapped input/output (MMIO) space of the virtual device; and assigning the virtual device to the virtual machine, the virtual machine to transmit data to and receive data from the physical device via the MMIO space of the virtual device.

公开(公告)号：EP4377806A1

公开(公告)日：2024-06-05

申请号：EP22850259.7

申请日：2022-07-27

申请人： INTEL Corporation

发明人： SANKARAN, Rajesh M. ,  LANTZ, Philip R. ,  JOSHI, Dhananjay A. ,  RANGANATHAN, Narayan ,  KHOR, Hai Ming ,  KUMAR, Sanjay ,  RAO, Nikhil ,  GAYEN, Saurabh ,  KAKAIYA, Utkarsh Y.

IPC分类号： G06F12/1027 ,  G06F3/06 ,  G06F15/78

CPC分类号： G06F9/544

公开(公告)号：EP4242893A2

公开(公告)日：2023-09-13

申请号：EP23156058.2

申请日：2023-02-10

申请人： INTEL Corporation

发明人： KAKAIYA, Utkarsh Y. ,  GAYEN, Saurabh ,  SOOD, Kapil ,  LAKKAKULA, Naveen

IPC分类号： G06F21/53 ,  G06F21/74

摘要： Methods and apparatus relating to confidential computing extensions for highly scalable accelerators are described. One or more embodiments provide extensions for scalable accelerator(s) to be able to directly assign accelerator work-queue(s) to Trusted Execution Environment (TEE) Virtual Machines (TVMs). Other embodiments are also disclosed and claimed.

公开(公告)号：EP3629187A1

公开(公告)日：2020-04-01

申请号：EP19182741.9

申请日：2019-06-26

申请人： INTEL Corporation

发明人： RAGHAV, Vinay ,  HARRIMAN, David J. ,  KAKAIYA, Utkarsh Y.

IPC分类号： G06F13/42

摘要： A device includes a plurality of ports and a plurality of capability registers that correspond to a respective one of the plurality of ports. The device is to connect to one or more processors of a host device through the plurality of ports, and each of the plurality of ports comprises a respective protocol stack to support a respective link between the corresponding port and the host device according to a particular interconnect protocol. Each of the plurality of capability registers comprises a respective set of fields for use in configuration of the link between its corresponding port and one of the one or more processors of the host device. The fields include a field to indicate an association between the port and a particular processor, a field to indicate a port identifier for the port, and a field to indicate a total number of ports of the device.