公开(公告)号：EP3274827B1

公开(公告)日：2020-03-25

申请号：EP16773661.0

申请日：2016-02-25

申请人： Intel Corporation

发明人： SUN, Mingqiu ,  POORNACHANDRAN, Rajesh ,  ZIMMER, Vincent J. ,  SELVARAJE, Gopinatth ,  SENGUPTA, Uttam K

IPC分类号： G06F9/50 ,  G06N20/00 ,  G06F1/329

公开(公告)号：EP4250114A3

公开(公告)日：2023-11-29

申请号：EP23179176.5

申请日：2018-12-31

申请人： Intel Corporation

发明人： HAN, Ke ,  JOURDAN, Stephan ,  SUN, Mingqiu ,  WANG, Dong ,  IYER, Prakash ,  MIALKOWSKI, Andrzej

IPC分类号： G06F9/50 ,  G06F15/78 ,  G06F1/3215 ,  G06F1/3234 ,  G06N3/063 ,  G06N5/04

摘要： A system includes an image signal processor (ISP) to process image data provided by an image sensor; a first hardware accelerator; a second hardware accelerator; a shared memory accessible by the first and second hardware accelerators; first processor circuitry to process sensor data, the sensor data including at least one of the image data or audio data, the audio data provided by an audio sensor; and second processor circuitry to implement an offload engine, the first processor circuitry to offload a computational task associated with the sensor data to the offload engine, the computational task to determine a context associated with the sensor data, at least one of the first processor circuitry or the second processor circuitry having at least one of a low power mode, an idle mode, or a sleep mode, the offload engine to determine the context when the at least one of the first processor circuitry or the second processor circuitry is in the at least one of the low power mode, the idle mode, or the sleep mode.

公开(公告)号：EP4250114A2

公开(公告)日：2023-09-27

申请号：EP23179176.5

申请日：2018-12-31

申请人： Intel Corporation

发明人： HAN, Ke ,  JOURDAN, Stephan ,  SUN, Mingqiu ,  WANG, Dong ,  IYER, Prakash ,  MIALKOWSKI, Andrzej

IPC分类号： G06F9/50

摘要： A system includes an image signal processor (ISP) to process image data provided by an image sensor; a first hardware accelerator; a second hardware accelerator; a shared memory accessible by the first and second hardware accelerators; first processor circuitry to process sensor data, the sensor data including at least one of the image data or audio data, the audio data provided by an audio sensor; and second processor circuitry to implement an offload engine, the first processor circuitry to offload a computational task associated with the sensor data to the offload engine, the computational task to determine a context associated with the sensor data, at least one of the first processor circuitry or the second processor circuitry having at least one of a low power mode, an idle mode, or a sleep mode, the offload engine to determine the context when the at least one of the first processor circuitry or the second processor circuitry is in the at least one of the low power mode, the idle mode, or the sleep mode.

公开(公告)号：EP3906506A1

公开(公告)日：2021-11-10

申请号：EP18945367.3

申请日：2018-12-31

申请人： Intel Corporation

发明人： HAN, Ke ,  JOURDAN, Stephan ,  SUN, Mingqiu ,  WANG, Dong ,  IYER, Prakash ,  MIALKOWSKI, Andrzej

IPC分类号： G06N3/04

公开(公告)号：EP3274827A1

公开(公告)日：2018-01-31

申请号：EP16773661.0

申请日：2016-02-25

申请人： Intel Corporation

发明人： SUN, Mingqiu ,  POORNACHANDRAN, Rajesh ,  ZIMMER, Vincent J. ,  SELVARAJE, Gopinatth ,  SENGUPTA, Uttam K

IPC分类号： G06F9/48 ,  G06F9/50

CPC分类号： G06F9/5094 ,  G06F1/329 ,  G06F9/5044 ,  G06F9/505 ,  G06F2209/509 ,  G06N20/00 ,  Y02D10/22 ,  Y02D10/24 ,  Y02D50/20

摘要： Technologies for transferring offloading or on-loading data or tasks between a processor and a coprocessor include a computing device having a processor and a sensor hub that includes a coprocessor. The coprocessor receives sensor data associated with one or more sensors and detects events associated with the sensor data. The coprocessor determines frequency, resource usage cost, and power state transition cost for the events. In response to an offloaded task request from the processor, the coprocessor determines an aggregate load value based on the frequency, resource usage cost, and power state transition cost, and determines whether to accept the offloaded task request based on the aggregate load value. The aggregate load value may be determined as an exponential moving average. The coprocessor may determine whether to accept the offloaded task request based on a principal component analysis of the events. Other embodiments are described and claimed.

公开(公告)号：EP3877854A1

公开(公告)日：2021-09-15

申请号：EP19882848.5

申请日：2019-04-16

申请人： INTEL Corporation

发明人： HAGHIGHAT, Mohammad R. ,  DOSHI, Kshitij ,  HERDRICH, Andrew J. ,  MOHAN, Anup ,  IYER, Ravishankar R. ,  SUN, Mingqiu ,  BHUYAN, Krishna ,  GOH, Teck Joo ,  KUMAR, Mohan J. ,  PRINKE, Michael ,  LEMAY, Michael ,  PELED, Leeor ,  TSAI, Jr-Shian ,  DURHAM, David M. ,  CHAMBERLAIN, Jeffrey D. ,  SUKHOMLINOV, Vadim A. ,  DAHLEN, Eric J. ,  BAGHSORKHI, Sara ,  SANE, Harshad ,  MELIK-ADAMYAN, Areg ,  SAHITA, Ravi ,  BABOKIN, Dmitry Yurievich ,  STEINER, Ian M. ,  BACHMUTSKY, Alexander ,  RAO, Anil ,  ZHANG, Mingwei ,  JAIN, Nilesh K. ,  FIROOZSHAHIAN, Amin ,  PATEL, Baiju V. ,  HUANG, Wenyong ,  RAGHURAM, Yeluri

IPC分类号： G06F9/50 ,  G06F11/30

公开(公告)号：EP3314504A2

公开(公告)日：2018-05-02

申请号：EP16837421.3

申请日：2016-05-26

申请人： Intel Corporation

发明人： SUN, Mingqiu ,  POORNACHANDRAN, Rajesh ,  ZIMMER, Vincent J. ,  SMITH, Ned M. ,  SELVARAJE, Gopinatth

IPC分类号： G06F21/54 ,  G06F21/53 ,  G06F21/56

CPC分类号： G06F8/41 ,  G06F9/455 ,  G06F9/45516 ,  G06F9/45533 ,  G06F21/00 ,  G06F21/57

摘要： Various embodiments are generally directed to techniques for supporting the distributed execution of a task routine among multiple secure controllers incorporated into multiple computing devices. An apparatus includes a first processor component and first secure controller of a first computing device, where the first secure controller includes: a selection component to select the first secure controller or a second secure controller of a second computing device to compile a task routine based on a comparison of required resources to compile the task routine and available resources of the first secure controller; and a compiling component to compile the task routine into a first version of compiled routine for execution within the first secure controller by the first processor component and a second version for execution within the second secure controller by a second processor component in response to selection of the first secure controller. Other embodiments are described and claimed.

公开(公告)号：EP3275119A1

公开(公告)日：2018-01-31

申请号：EP16769261.5

申请日：2016-02-24

申请人： Intel Corporation

发明人： SUN, Mingqiu ,  ZIMMER, Vincent J. ,  POORNACHANDRAN, Rajesh ,  SELVARAJE, Gopinatth

IPC分类号： H04L9/32 ,  H04L12/24 ,  G06Q20/00

CPC分类号： G06Q20/204 ,  G06F21/606 ,  G06Q20/202 ,  G06Q20/4097 ,  H04L63/04 ,  H04L63/0428 ,  H04L63/101

摘要： A point-of-sale device (“POS”) is described to include a secure transaction tunnel generator (“STG”). The STG may generate secure tunnels between peripherals attached to the POS and remote network resources. The secure tunnel may be generated using a trusted execution environment (“TEE”) of the POS. The STG may be alerted to the need to generate the secure tunnel based on an alert from the peripheral. The STG may execute under a protected environment and may generate two ends of a secure transaction tunnel using the TEE. The STG may also check the peripheral against whitelists and/or blacklists to determine whether the peripheral is allowed or not disallowed to participate in secure transactions. By generating the secure tunnel, the STG may facilitate performance of transactions in such a way that sensitive information is not available to unsecured processes in the POS. Other embodiments may be described and/or claimed.

公开(公告)号：EP3274814A1

公开(公告)日：2018-01-31

申请号：EP15885834.0

申请日：2015-03-23

申请人： Intel Corporation

发明人： ZIMMER, Vincent J. ,  YAO, Jiewen ,  JAYAKUMAR, Sarathy ,  SWANSON, Robert C. ,  POORNACHANDRAN, Rajesh ,  SELVARAJE, Gopinatth ,  SUN, Mingqiu ,  HOWARD, John S. ,  GORBATOV, Eugene

IPC分类号： G06F9/06

CPC分类号： G06F9/4856 ,  G06F1/1632 ,  G06F1/3215 ,  G06F1/3287 ,  G06F1/3293 ,  G06F9/46 ,  G06F9/4812 ,  G06F9/4893 ,  G06F9/5027 ,  Y02D10/122 ,  Y02D10/171 ,  Y02D10/24

摘要： Methods, apparatuses and storage medium associated with migration between processors by a computing device are disclosed. In various embodiments, a portable electronic device having an internal processor and internal memory may be attached to a dock. The dock may include another processor as well other memory. The attachment of the dock to the portable electronic device may cause an interrupt. In response to this interrupt, a state associated with the internal processor may be copied to the other memory of the dock. Instructions for the computing device may then be executed using the other processor of the dock. Other embodiments may be disclosed or claimed.

公开(公告)号：EP3191939A1

公开(公告)日：2017-07-19

申请号：EP14901679.2

申请日：2014-09-10

申请人： Intel Corporation

发明人： SHI, Lei Luc ,  WANG, Xin ,  SUN, Mingqiu ,  WANG, Ligang ,  SELVARAJE, Gopinatth

IPC分类号： G06F9/44

CPC分类号： G06F8/36 ,  G06F8/31 ,  G06F8/315 ,  G06F8/427 ,  G06F8/63 ,  G06F9/44521

摘要： Apparatuses, methods and storage media associated with generating a custom class library are disclosed herein. In embodiments, an apparatus may include an analyzer configured to receive a workload for a device and a class library used by the workload, analyze the workload and class library, identify one or more workload full API call chains, and generate information about the one or more workload full API call chains. Further, the apparatus may include a generator to generate from the class library, a custom class library for the workload that is smaller than the class library, based at least in part on the one or more workload full API call chains. Other embodiments may be disclosed or claimed.

摘要翻译： 这里公开了与生成定制类库相关联的设备，方法和存储介质。 在实施例中，一种装置可以包括分析器，该分析器被配置为接收设备和工作负载使用的类库的工作负载，分析工作负载和类库，识别一个或多个工作负载完整API调用链，并且生成关于该工具的信息或 更多工作负载完整的API调用链。 此外，所述装置可以包括生成器，用于至少部分地基于所述一个或多个工作负载完整API调用链，从所述类库生成用于所述工作负载的小于所述类库的定制类库。 其他实施例可以被公开或要求保护。