HIGHLY PARALLEL SWITCHING SYSTEMS UTILIZING ERROR CORRECTION II
    2.
    发明公开
    HIGHLY PARALLEL SWITCHING SYSTEMS UTILIZING ERROR CORRECTION II 有权
    纠错II HIGH并联切换系统

    公开(公告)号:EP1730987A4

    公开(公告)日:2007-07-25

    申请号:EP05724922

    申请日:2005-03-08

    IPC分类号: H04Q3/68 G06F15/16 H04L12/56

    摘要: An interconnection network has a first stage network and a second stage network and a collection of devices outside the network so that a first device is capable of sending data to a second device. The first stage network is connected to inputs of the second stage network. The first and second stage networks each have more outputs than inputs. The data is first sent from the first device to the first stage network and then from the first stage network to the second stage network. The data is sent to the second device from the second stage network. The number of inputs to a device w the collection of devices from the second stage network exceeds the number of outputs from device w into the first stage network. The device w with Np input ports is capable of simultaneously receiving data from Np devices in the collection of devices. The latency through the entire system may be a fixed constant.