Off-chip driver circuits
    3.
    发明公开
    Off-chip driver circuits 失效
    芯片Ausgangsschnittstellenschaltung。

    公开(公告)号:EP0260389A2

    公开(公告)日:1988-03-23

    申请号:EP87109208.6

    申请日:1987-06-26

    IPC分类号: H03K19/094 H03K19/017

    摘要: An off-chip driver circuit is provided which in­cludes a pull-up device (32) disposed between an output terminal (62) and a first voltage dropping diode (34) which is connected to a first voltage supply source (VH), and a first voltage limiting circuit (38) connected to the common point (C) between the pull-up device and the voltage dropping diode (34). The off-chip driver circuit further includes an input inverter circuit (14) having an output (A) connected to the control element of the pull-up device (32). The inverter circuit is serially connected with a second voltage dropping diode (20) which is connected to the first voltage supply source (VH) and a second voltage limiting circuit (22) connected to the common point (B) between the second voltage dropping diode (20) and the inverter. First (36) and second (30) switches are also provided to short out the first (34) and second (20) voltage dropping diodes, respectively, when all circuits connected to the output terminal use a common voltage supply. A pull-down device (58) serially connected to a pass device (60) is provided between the output terminal (62) and a point of reference potential. A buffer circuit (46, 52) having an output (E) connected to the pull-down device (58) is coupled to a second voltage supply source (VDD) having a voltage signifi­cantly lower than the voltage of the first voltage supply source (VH).

    摘要翻译: 提供一种片外驱动器电路,其包括设置在连接到第一电压源(VH)的输出端子(62)和第一降压二极管(34)之间的上拉装置(32),以及 第一电压限制电路(38)连接到上拉装置和降压二极管(34)之间的公共点(C)。 片外驱动电路还包括具有连接到上拉装置(32)的控制元件的输出(A)的输入反相器电路(14)。 逆变器电路与连接到第一电压源(VH)的第二降压二极管(20)串联连接,以及连接到第二降压二极管(B)之间的公共点(B)的第二限压电路(22) (20)和逆变器。 还提供了第一(36)和第二(30)开关,以便当连接到输出端子的所有电路使用公共电压源时分别短路第一(34)和第二(20)个降压二极管。 串联连接到通过装置(60)的下拉装置(58)设置在输出端(62)和参考点之间。 具有连接到下拉装置(58)的输出(E)的缓冲电路(46,52)被耦合到具有明显低于第一电压源的电压的电压的第二电压源(VDD) VH)。

    Power up detection circuits
    4.
    发明公开
    Power up detection circuits 失效
    Schaltungen zur Detektion des Einschaltens。

    公开(公告)号:EP0595748A1

    公开(公告)日:1994-05-04

    申请号:EP93480138.2

    申请日:1993-09-21

    IPC分类号: H03K17/22

    CPC分类号: H03K17/223

    摘要: A power up detection circuit is provided which includes a power supply terminal, an output terminal, an impedance device coupling the output terminal to the power supply terminal and a latch including a first inverter having a first device connected between the output terminal and a point of reference potential and a second device connected between the output terminal and the power supply terminal, the devices are designed so that subthreshold current passing through the first device is greater than the effective subthreshold current passing through the impedance device and the second device, and a second inverter including third and fourth devices which are designed so that a smaller subthreshold current passes through the third device than the subthreshold current passing through the fourth device. The power up circuit may further include a capacitor connected between the power supply terminal and gate electrodes of the first and second devices.

    摘要翻译: 提供了一种上电检测电路,其包括电源端子,输出端子,将输出端子耦合到电源端子的阻抗装置和包括第一逆变器的锁存器,第一逆变器具有连接在输出端子和点 参考电位和连接在输出端子和电源端子之间的第二器件,器件被设计成使得通过第一器件的亚阈值电流大于通过阻抗器件和第二器件的有效亚阈值电流, 逆变器包括第三和第四器件,其被设计为使得比通过第四器件的亚阈值电流更小的亚阈值电流通过第三器件。 上电电路还可以包括连接在第一和第二器件的电源端子和栅电极之间的电容器。

    Built-in self test for integrated circuits
    5.
    发明公开
    Built-in self test for integrated circuits 失效
    EingebauteSelbstprüfungfürintegrierte Schaltungen。

    公开(公告)号:EP0472818A2

    公开(公告)日:1992-03-04

    申请号:EP91107420.1

    申请日:1991-05-07

    IPC分类号: G06F11/26 G11C29/00

    摘要: A built-in, i.e., on-chip, self-test system for a VLSI logic or memory module (10). A deterministic data pattern generator (80) is provided on the VLSI chip, and operates to test a chip module and provide a fail/no-fail result, along with data identifying where the fail occurred. This location data is captured and made available for subsequent utilization. The built-in test circuitry is programmable, and is provided with a looping capability to provide enhanced burn-in testing, for example.

    摘要翻译: 用于VLSI逻辑或存储器模块(10)的内置的,即片上自检系统。 在VLSI芯片上提供确定性数据模式发生器(80),并且操作以测试芯片模块并提供故障/不失败结果以及识别发生故障的数据。 该位置数据被捕获并可用于后续利用。 内置测试电路是可编程的,并且具有循环功能,例如提供增强的老化测试。

    Off-chip driver circuits
    8.
    发明公开
    Off-chip driver circuits 失效
    离线驱动电路

    公开(公告)号:EP0260389A3

    公开(公告)日:1989-06-28

    申请号:EP87109208.6

    申请日:1987-06-26

    IPC分类号: H03K19/094 H03K19/017

    摘要: An off-chip driver circuit is provided which in­cludes a pull-up device (32) disposed between an output terminal (62) and a first voltage dropping diode (34) which is connected to a first voltage supply source (VH), and a first voltage limiting circuit (38) connected to the common point (C) between the pull-up device and the voltage dropping diode (34). The off-chip driver circuit further includes an input inverter circuit (14) having an output (A) connected to the control element of the pull-up device (32). The inverter circuit is serially connected with a second voltage dropping diode (20) which is connected to the first voltage supply source (VH) and a second voltage limiting circuit (22) connected to the common point (B) between the second voltage dropping diode (20) and the inverter. First (36) and second (30) switches are also provided to short out the first (34) and second (20) voltage dropping diodes, respectively, when all circuits connected to the output terminal use a common voltage supply. A pull-down device (58) serially connected to a pass device (60) is provided between the output terminal (62) and a point of reference potential. A buffer circuit (46, 52) having an output (E) connected to the pull-down device (58) is coupled to a second voltage supply source (VDD) having a voltage signifi­cantly lower than the voltage of the first voltage supply source (VH).

    Power supply adapter systems
    9.
    发明公开
    Power supply adapter systems 失效
    Stromversorgungsadaptersystem。

    公开(公告)号:EP0260474A1

    公开(公告)日:1988-03-23

    申请号:EP87112151.3

    申请日:1987-08-21

    IPC分类号: G05F1/46 H02M1/10 G11C5/00

    摘要: A power supply adapter system is provided which includes a voltage supply source terminal, an output terminal, first and second switches, the first switch being disposed between the voltage supply source terminal and the output terminal, voltage conversion means serially connected with the second switch and disposed between the voltage supply source terminal and a point of reference potential and having an output coupled to the output terminal, and means for detecting first and second ranges of voltages at the power supply source terminal and for producing first and second control voltages, respectively, to control the first and second switches.

    摘要翻译: 提供一种电源适配器系统,其包括电压源端子,输出端子,第一和第二开关,第一开关设置在电压源端子和输出端子之间,电压转换装置与第二开关串联连接, 设置在电压源端子和参考电位点之间并且具有耦合到输出端子的输出端,以及用于检测电源端子处的第一和第二电压范围并分别用于产生第一和第二控制电压的装置, 以控制第一和第二开关。