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公开(公告)号：EP1118124A1
公开(公告)日：2001-07-25
申请号：EP99955791.1
申请日：1999-09-20
IPC分类号： H01L29/732 , H01L21/331
CPC分类号： H01L29/66287 , H01L29/7322
摘要： The invention relates to a bipolar transistor and a method for producing same. The aim of the invention is to provide a bipolar transistor and a method for producing same, which during the use of a single-process poly-silicon technology with differential epitaxis for the production of bases overcomes the disadvantages of conventional systems, so as notably further to improve the high-speed properties of a bipolar transistor, provide highly conductive connections between the metal contacts and the active (internal) transistor region and a minimized passive transistor surface while at the same time avoiding greater process complexity and increased contact resistances. To this end, by creating suitable epitaxis conditions a poly-silicon layer is deposited on the insulating area which is thicker than the epitaxis layer in the active transistor area. The greater thickness of the poly-silicon layer in relation to the epitaxis layer is achieved through the use of a very low temperature for the deposition of part or all of the buffer layer. Th use of a very low deposition temperature results in improved seeding of the insulating layer and a reduction in the deposition dead time, which makes it possible to produce a thicker layer on the insulating layer than in the active transistor area.
摘要翻译： 本发明涉及一种双极晶体管及其制造方法。 本发明的目的是提供一种双极型晶体管及其制造方法，该双极型晶体管及其制造方法在使用具有差动外延的单工艺多晶硅技术来生产基座的过程中克服了传统系统的缺点，特别是进一步 为了改善双极晶体管的高速属性，在金属触点和有源（内部）晶体管区域之间提供高导电连接，并且提供最小化的无源晶体管表面，同时避免更大的工艺复杂性和增加的接触电阻。 为此，通过产生合适的外延条件，将多晶硅层沉积在比有源晶体管区域中的外延层更厚的绝缘区域上。 通过使用非常低的温度来沉积部分或全部缓冲层，实现多晶硅层相对于外延层的更大厚度。 使用非常低的沉积温度可以改善绝缘层的接种和减少沉积停滞时间，这使得可以在绝缘层上产生比有源晶体管区域更厚的层。
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公开(公告)号：EP1112594A1
公开(公告)日：2001-07-04
申请号：EP99968740.3
申请日：1999-09-08
IPC分类号： H01L29/732 , H01L29/737 , H01L29/10 , H01L21/331
CPC分类号： H01L29/66242 , H01L21/8249 , H01L29/0821 , H01L29/7378
摘要： The invention relates to a vertical bipolar transistor and a method for the production thereof. The aim of the invention is to produce a vertical bipolar transistor and to disclose a method for the production thereof, whereby excellent high frequency properties can be obtained for said transistor using the simplest possible production technology involving an implanted epitaxy-free collector and only one polysilicon layer spread over a large surface and which can be easily integrated into a conventional mainstream CMOS process without epitaxially produced trough areas. It is possible to simplify technology, while at the same time improving the high frequency parameters of vertical bipolar transistors by reducing the parasitic lateral and vertical components of the resistance of the collector, by means of a self-adjusting transistor construction in conjunction with a special method of production, whereby a highly doped monocrystalline base connection area surrounding the active base in a ring-like manner is removed in the region of the collector connection by reactive ion etching, together with the underlying less doped area of the collector or a part thereof.
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