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    TECHNIQUES FOR SWITCHING BETWEEN OPERATING SYSTEMS
    1.
    发明公开
    TECHNIQUES FOR SWITCHING BETWEEN OPERATING SYSTEMS 审中-公开
    VERFAHREN ZUM UMSCHALTEN ZWISCHEN BETRIEBSSYSTEMEN

    公开(公告)号：EP3120242A1

    公开(公告)日：2017-01-25

    申请号：EP15764894.0

    申请日：2015-03-10

    申请人： Intel Corporation

    发明人： SIDDIQI, Faraz A. ,  COOPER, Barnes

    IPC分类号： G06F9/44

    CPC分类号： G06F9/4406 ,  G06F9/4418 ,  G06F9/45558 ,  G06F9/46 ,  G06F13/00 ,  G06F2009/45575

    摘要： Various embodiments are generally directed to an apparatus, method and other techniques for receiving information to invoke a transition from a first operating system to a second operating system, copying a system context for the second operating system from a location of a non-volatile memory to a volatile memory, the location associated with the second operating system and transitioning from the first operating system to the second operating system using the system context for the second operating system.

    摘要翻译： 各种实施例通常涉及用于接收信息以调用从第一操作系统到第二操作系统的转换的装置，方法和其他技术，将第二操作系统的系统上下文从非易失性存储器的位置复制到 易失性存储器，与第二操作系统相关联的位置，并且使用第二操作系统的系统上下文从第一操作系统转移到第二操作系统。

    ENTERING AND EXITING POWER MANAGED STATES WITHOUT DISRUPTING ACCELERATED GRAPHICS PORT TRANSACTIONS
    2.
    发明公开
    ENTERING AND EXITING POWER MANAGED STATES WITHOUT DISRUPTING ACCELERATED GRAPHICS PORT TRANSACTIONS 有权
    绩效管理状态转换无AGP交易病症

    公开(公告)号：EP1386219A2

    公开(公告)日：2004-02-04

    申请号：EP01987145.8

    申请日：2001-11-20

    申请人： INTEL CORPORATION

    发明人： CLINE, Leslie ,  COOPER, Barnes ,  NANDURI, Anil ,  COHEN, Debra ,  JAIN, Satchitanan

    IPC分类号： G06F1/32

    CPC分类号： G06T17/00 ,  G06F1/3203

    摘要： An interface between an accelerated graphics port graphics controller (AGP-GC) and a core controller to prevent entry into a low power state from interfering with transfers to or from the AGP-GC that have been requested but not completed. The core controller can communicate to the AGP-GC an intent to enter a low power state, while the AGP-GC can communicate to the core controller the busy status of the AGP-GC. When the AGP-GC recieves notice of an intent to enter a low power state, it can stop issuing requests to the core controller. When the core controller detects that the AGP-GC is busy, the core controller can postpone entry into the low power state until the AGP-GC completes any requests that are in progress. In an alternate use of the interface, if the AGP-GC wishes to make a request during a low power state, it can signal the core controller of this need by indicating a busy status, which can trigger the core controller to initiate an exit from the low power state.

    EFFICIENT SYSTEM MANAGEMENT SYNCHRONIZATION AND MEMORY ALLOCATION
    4.
    发明公开
    EFFICIENT SYSTEM MANAGEMENT SYNCHRONIZATION AND MEMORY ALLOCATION 有权
    高效的系统管理同步和内存分配

    公开(公告)号：EP1671230A1

    公开(公告)日：2006-06-21

    申请号：EP04785380.9

    申请日：2004-10-06

    申请人： INTEL CORPORATION

    发明人： COOPER, Barnes ,  KOBAYASHI, Grant

    IPC分类号： G06F9/46 ,  G06F1/32

    CPC分类号： G06F12/0284 ,  G06F9/5016 ,  G06F15/16

    摘要： A method and apparatus for optimization of multiprocessor synchronization and allocation of system management memory space is herein described. When a system management interrupt (SMI) is received, a first processor checks the state of a second processor, which may be done by checking a storage medium storing values representative of the second processor's state. The first processor handles the SMI or waits for the second processor dependent on the state of the second processor. Furthermore, system management memory is allocated where a first system management memory space assigned to a first processor overlaps a second system management memory space assigned to a second processor, leaving first and second non-overlapping region.

    METHOD AND APPARATUS FOR DETERMINING THROTTLE SETTINGS
    7.
    发明公开
    METHOD AND APPARATUS FOR DETERMINING THROTTLE SETTINGS 审中-公开
    方法和设备，用来确定节气门VALUES

    公开(公告)号：EP1381931A2

    公开(公告)日：2004-01-21

    申请号：EP02728429.8

    申请日：2002-03-07

    申请人： INTEL CORPORATION

    发明人： COOPER, Barnes ,  KING, Matt ,  FLETCHER, Terry ,  WYATT, David

    IPC分类号： G06F1/20

    CPC分类号： G06F1/206 ,  Y02D10/16

    摘要： A method and apparatus are provided for obtaining throttle settings of a system, such as a chipset. A first bandwidth may be applied to a first area (or interface) of the system and a temperature of the first area may be sensed using a thermal sensor. The bandwidth passing through this first area may be increased or decreased based on the sensed temperature to obtain an ideal or optimized setting.