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1.
公开(公告)号:EP0560069A1
公开(公告)日:1993-09-15
申请号:EP93102046.5
申请日:1993-02-10
发明人: Bergendahl, Albert Stephan , Bertin, Claude Louis , Cronin, John Edward , Kalter, Howard Leo , Kenney, Donald McAlpine , Lam, Chung Hon , Lee, Hsing-San
IPC分类号: H01L27/115 , H01L29/788 , H01L27/108
CPC分类号: H01L29/7882 , H01L27/105 , H01L27/1052 , H01L27/10829 , H01L27/115
摘要: A semiconductor device memory array formed on a semiconductor substrate comprising a multiplicity of field effect transistor DRAM devices disposed in array is disclosed. Each of the DRAM devices is paired with a non-volatile EEPROM cell and the EEPROM cells are disposed in a shallow trench in the semiconductor substrate running between the DRAM devices such that each DRAM-EEPROM pair shares a common drain diffusion (11). The EEPROM cells are arranged in the trench such that there are discontinuous laterally disposed floating gate polysilicon electrodes (5) and continuous horizontally disposed program (22) and recall (18) gate polysilicon electrodes. The floating gate is separated from the program and recall gates by a silicon rich nitride (7). The array of the invention provides high density shadow RAMs. Also disclosed are methods for the fabrication of devices of the invention.
摘要翻译: 公开了一种半导体器件存储器阵列,其形成在包括排列成阵列的多个场效应晶体管DRAM器件的半导体衬底上。 每个DRAM器件与非易失性EEPROM单元配对,并且EEPROM单元被布置在运行在DRAM器件之间的半导体衬底中的浅沟槽中,使得每个DRAM- EEPROM对共享共同的漏极扩散(11)。 EEPROM单元布置在沟槽中,使得存在不连续的侧向设置的浮栅多晶硅电极(5)和连续水平布置的程序(22)和调用(18)栅极多晶硅电极。 浮动栅极与程序分离并通过富氮氮化物(7)进行调用。 本发明的阵列提供了高密度的阴影RAM。 还公开了用于制造本发明的装置的方法。