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19 条记录 (耗时 0.012 秒)

    Bus master with antilockup and no idle bus cycles
    1.
    发明公开
    Bus master with antilockup and no idle bus cycles 失效
    总线主机与防盗和无空闲总线周期

    公开(公告)号：EP0481908A3

    公开(公告)日：1993-11-18

    申请号：EP91480140.2

    申请日：1991-09-06

    申请人： International Business Machines Corporation

    发明人： Fischer, Lisa Lyn ,  Hanna, Stephen Dale

    IPC分类号： G06F13/28 ,  G06F13/30 ,  G06F13/368

    CPC分类号： G06F13/30 ,  G06F13/368

    摘要： Bus master for use in computer system includes logic for determining the number of words remaining to be transferred in a DMA operation to supply signals to permit arbitration to start for the next DMA request, thereby avoiding an idle cycle . A timeout state machine is also included to prevent the bus master state machine from hanging in a state with no exit. Errors can be masked to permit analysis of system problems.

    摘要翻译： 在计算机系统中使用的总线主机包括用于确定在DMA操作中剩余要传送的字数的逻辑，以提供信号以允许仲裁开始下一个DMA请求，从而避免空闲周期。 还包括一个超时状态机，以防止总线主机状态机挂在没有退出状态。 错误可以被掩盖，以便分析系统问题。

    System for transferring data between buses, using direct memory access devices
    2.
    发明公开
    System for transferring data between buses, using direct memory access devices 失效
    使用直接内存访问设备在总线之间传输数据的系统

    公开(公告)号：EP0479702A3

    公开(公告)日：1994-02-09

    申请号：EP91480141.0

    申请日：1991-09-06

    申请人： International Business Machines Corporation

    发明人： Boldt, Gerald Donald ,  Hanna, Stephen Dale ,  Vogelsberg, Robert Eric

    IPC分类号： G06F13/28 ,  G06F13/40

    CPC分类号： G06F13/28

    摘要： Chaining or cascading two or more DMA devices to perform DMA transfers across common buses. DMA devices are modified to act as a bus slave relative to another DMA bus master device so that information can be transferred from one bus to another across a third bus common to the DMA devices. The slave DMA can cause the master DMA to stop sending data to limit the bandwidth requirements of the common bus.

    摘要翻译： 链接或级联两个或多个DMA设备以通过公共总线执行DMA传输。 DMA设备被修改为充当相对于另一个DMA总线主设备的总线从设备，使得信息可以通过DMA设备共有的第三总线从一个总线传送到另一个总线。 从DMA可以使主DMA停止发送数据以限制公共总线的带宽要求。

    Multidirectional scan and print capability
    4.
    发明公开
    Multidirectional scan and print capability 失效

    公开(公告)号：EP0267418A2

    公开(公告)日：1988-05-18

    申请号：EP87114432.5

    申请日：1987-10-02

    申请人： International Business Machines Corporation

    发明人： Finlay, David Ernest ,  Hanna, Stephen Dale ,  Stevenson, David Craig ,  Varga, John Thomas

    IPC分类号： G06K15/02 ,  G06K15/12

    CPC分类号： G06K15/02 ,  G06K2215/0065 ,  G06K2215/0077

    摘要： A character generator with multidirectional scan and variable line and character (or symbol) size capability is disclosed. Universality is implemented by producing a serial binary stream which can be used to print or display in any of eight combinations of scan direction and progression, that is, for scan direction left to right, or vice versa, progressing up or down, or scan direction top to bottom or vice versa, progressing left or right. In formatting the serial binary stream, a font is accessed (for basic symbol definition), which selectively provides for orthogonal scans of the symbol definitions. Variable line size is implemented by terminating a symbol row (or line) based on a predetermined size criteria regardless of the comparable font dimension and "filling" up to the line size to the extent the corresponding font dimension is less than the predetermined size criteria. Variable character (or symbol) size is implemented by independently multiplying the effect of a symbol definition by selected (integral) factors, in orthogonal directions. The general architecture includes a font table (for symbol definition), an address/escape (A/E) table, defining symbol size for comparison with line size parameters, a character position escape (CPE) table to define a leading character or symbol on each line and a page buffer (PB) memory defining the characters (symbols) in the document and their relationship with other characters (symbols). Access to the CPE table allows access to the PB, from there to the A/E table and from there to the font allows extraction of selected and appropriate portions of the symbol definition to make up the binary system.

    Bus master with antilockup and no idle bus cycles
    5.
    发明公开
    Bus master with antilockup and no idle bus cycles 失效
    BusiergeschützteBus-Master-Einheit ohne leerlaufende Buszyklen。

    公开(公告)号：EP0481908A2

    公开(公告)日：1992-04-22

    申请号：EP91480140.2

    申请日：1991-09-06

    申请人： International Business Machines Corporation

    发明人： Fischer, Lisa Lyn ,  Hanna, Stephen Dale

    IPC分类号： G06F13/28 ,  G06F13/30 ,  G06F13/368

    CPC分类号： G06F13/30 ,  G06F13/368

    摘要： Bus master for use in computer system includes logic for determining the number of words remaining to be transferred in a DMA operation to supply signals to permit arbitration to start for the next DMA request, thereby avoiding an idle cycle . A timeout state machine is also included to prevent the bus master state machine from hanging in a state with no exit. Errors can be masked to permit analysis of system problems.

    摘要翻译： 在计算机系统中使用的总线主机包括用于确定在DMA操作中剩余要传送的字数的逻辑，以提供信号以允许仲裁开始下一个DMA请求，从而避免空闲周期。 还包括一个超时状态机，以防止总线主机状态机挂在没有退出的状态。 错误可以被掩盖，以便分析系统问题。

    System for transferring data between buses, using direct memory access devices
    6.
    发明公开
    System for transferring data between buses, using direct memory access devices 失效
    系统用于传输总线之间的数据，使用设备的直接存储器存取。

    公开(公告)号：EP0479702A2

    公开(公告)日：1992-04-08

    申请号：EP91480141.0

    申请日：1991-09-06

    申请人： International Business Machines Corporation

    发明人： Boldt, Gerald Donald ,  Hanna, Stephen Dale ,  Vogelsberg, Robert Eric

    IPC分类号： G06F13/28 ,  G06F13/40

    CPC分类号： G06F13/28

    摘要： Chaining or cascading two or more DMA devices to perform DMA transfers across common buses. DMA devices are modified to act as a bus slave relative to another DMA bus master device so that information can be transferred from one bus to another across a third bus common to the DMA devices. The slave DMA can cause the master DMA to stop sending data to limit the bandwidth requirements of the common bus.

    摘要翻译： 链或级联两个或多个DMA装置以执行跨越公共总线DMA传输。 DMA装置被修改以充当总线从设备相对于另一个DMA总线主设备，以便没有信息能够被从一个总线跨共同给DMA设备的第三总线传送到另一个。 从属DMA可导致主DMA停止发送数据，以限制公共总线的带宽要求。

    Multidirectional scan and print capability
    7.
    发明公开
    Multidirectional scan and print capability 失效
    Mehrrichtungs-Abtast- und-Druckfähigkeit。

    公开(公告)号：EP0267415A2

    公开(公告)日：1988-05-18

    申请号：EP87114428.3

    申请日：1987-10-02

    申请人： International Business Machines Corporation

    发明人： Dominques, Ruben, Jr. ,  Lopez, Jesus Cabrera ,  Finlay, David Ernest ,  Stevenson, David Craig ,  Hanna, Stephen Dale ,  Zegafuse, Donald Ward, Jr.

    IPC分类号： G06K15/02 ,  G06K15/12

    CPC分类号： G06K15/02 ,  G06K2215/0065 ,  G06K2215/0077

    摘要： A character generator with multidirectional scan and variable line and character (or symbol) size capability is disclosed. Universality is implemented by producing a serial binary stream which can be used to print or display in any of eight combinations of scan direction and progression, that is, for scan direction left to right, or vice versa, progressing up or down, or scan direction top to bottom or vice versa, progressing left or right. In formatting the serial binary stream, a font is accessed (for basic symbol definition), which selectively provides for orthogonal scans of the symbol definitions. Variable line size is implemented by terminating a symbol row (or line) based on a predetermined size criteria regardless of the comparable font dimension and "filling" up to the line size to the extent the corresponding font dimension is less than the predetermined size criteria. Variable character (or symbol) size is implemented by independently multiplying the effect of a symbol definition by selected (integral) factors, in orthogonal directions. The general architecture includes a font table (for symbol definition), an address/escape (A/E) table, defining symbol size for comparison with line size parameters, a character position escape (CPE) table to define a leading character or symbol on each line and a page buffer (PB) memory defining the characters (symbols) in the document and their relationship with other characters (symbols). Access to the CPE table allows access to the PB, from there to the A/E table and from there to the font allows extraction of selected and appropriate portions of the symbol definition to make up the binary system.

    摘要翻译： 公开了一种具有多向扫描和可变行和字符（或符号）大小能力的字符发生器。 普遍性是通过产生一个串行二进制流来实现的，该串行二进制流可用于以扫描方向和进展的八种组合中的任何一种打印或显示，即扫描方向从左到右，反之亦然，向上或向下，或扫描方向 从上到下，反之亦然，向左或向右进行。 在格式化串行二进制流时，访问字体（用于基本符号定义），其选择性地提供符号定义的正交扫描。 可变线尺寸通过基于预定尺寸标准终止符号行（或线）来实现，而不管可比较的字体尺寸如何，并且在相应字体尺寸小于预定尺寸标准的范围内“填充”直到线尺寸。 通过在正交方向上独立地将符号定义的效果乘以所选（积分）因子来实现可变字符（或符号）大小。 一般架构包括字体表（用于符号定义），地址/转义（A / E）表，定义与行大小参数进行比较的符号大小，用于定义前导字符或符号的字符位置转义（CPE）表 每个行和一个页面缓冲区（PB）存储器定义文档中的字符（符号）及其与其他字符（符号）的关系。 访问CPE表允许访问PB，从那里到A / E表，从那里到字体允许提取符号定义的选定和适当的部分以构成二进制系统。