Data and text processing system having terminals with dual emulation capability
    1.
    发明公开
    Data and text processing system having terminals with dual emulation capability 失效
    Datenen和Textverarbeitungssystem mit Endstationen doppelterEmulationsfähigkeit。

    公开(公告)号:EP0125411A2

    公开(公告)日:1984-11-21

    申请号:EP84102532.3

    申请日:1984-03-09

    IPC分类号: G06F15/20

    CPC分类号: G06F17/21

    摘要: The system comprises at least one central processing (10, 12), a plurality of input/output terminals (14) and at least one control unit (16) having a plurality of ports (40, 42) each being connected to an input output terminal (14) for interfacing it with at least one central processing unit (10, 12). Each input/output terminal comprises a plurality of support logic means connected to one of the ports (40, 42) of the control unit (16), a buffer to each support logic means for storing data received from or to be transmitted to a central processing unit (10, 12), a text processor (38), a keyboard connected to the text processor (38) for effecting processing of link data and a printer and display (36, 48, 56) for outputting data and text character information. This structure allows the text processor (38) in the input/output terminal (14) to simultaneously, yet independently, emulate a display and printer normally associated with a host central processing unit.

    摘要翻译: 该系统包括至少一个中央处理(10,12),多个输入/输出端子(14)和至少一个具有多个端口(40,42)的控制单元(16),每个端口连接到输入输出端 终端(14),用于将其与至少一个中央处理单元(10,12)对接。 每个输入/输出终端包括连接到控制单元(16)的端口(40,42)中的一个的多个支持逻辑装置,每个支持逻辑装置的缓冲器,用于存储从或将发送到中央的数据 处理单元(10,12),文本处理器(38),连接到用于执行链接数据处理的文本处理器(38)的键盘和用于输出数据和文本字符信息的打印机和显示器(36,48,56) 。 该结构允许输入/输出端子(14)中的文本处理器(38)同时但是独立地模拟通常与主机中央处理单元相关联的显示器和打印机。

    Data and text processing system having terminals with dual emulation capability
    2.
    发明公开
    Data and text processing system having terminals with dual emulation capability 失效
    具有双重模拟能力的终端的数据和文本处理系统

    公开(公告)号:EP0125411A3

    公开(公告)日:1986-09-03

    申请号:EP84102532

    申请日:1984-03-09

    IPC分类号: G06F15/20

    CPC分类号: G06F17/21

    摘要: The system comprises at least one central processing (10, 12), a plurality of input/output terminals (14) and at least one control unit (16) having a plurality of ports (40, 42) each being connected to an input output terminal (14) for interfacing it with at least one central processing unit (10, 12). Each input/output terminal comprises a plurality of support logic means connected to one of the ports (40, 42) of the control unit (16), a buffer to each support logic means for storing data received from or to be transmitted to a central processing unit (10, 12), a text processor (38), a keyboard connected to the text processor (38) for effecting processing of link data and a printer and display (36, 48, 56) for outputting data and text character information. This structure allows the text processor (38) in the input/output terminal (14) to simultaneously, yet independently, emulate a display and printer normally associated with a host central processing unit.

    Word processing system with a printer shared by a plurality of display units
    3.
    发明公开
    Word processing system with a printer shared by a plurality of display units 失效
    Wortverarbeitungssystem mit einem zwischen mehreren Anzeigeeinheiten geteilten Drucker。

    公开(公告)号:EP0061571A2

    公开(公告)日:1982-10-06

    申请号:EP82100970.1

    申请日:1982-02-10

    IPC分类号: G06F15/20

    CPC分类号: G06F17/24

    摘要: Word processing systems wherein material to be printed is formatted on a plurality of display units having each a display (22), and a text formatting processor (14) which formats the display material, the display units sharing a single printer (10). This is accomplished by having at least one of the display units called the primary display unit (11) which comprises means for controlling the sharing of the printer (10) by the other display units, and each of the other display units which communicates with the printer under the control of these printer sharing control means and through a printer sharing adapter (28). At least part of this printer sharing control means is contained in the text formatting processor (14) of the primary display unit (11).

    摘要翻译: 字处理系统,其中待印刷的材料被格式化在具有每个显示器的多个显示单元(22)上,以及格式化显示材料的文本格式化处理器(14),所述显示单元共享单个打印机(10)。 这通过具有被称为主显示单元(11)的显示单元中的至少一个来实现,该显示单元包括用于控制由其他显示单元共享打印机(10)的装置,以及与其它显示单元 打印机在这些打印机共享控制装置的控制下,并通过打印机共享适配器(28)。 该打印机共享控制装置的至少一部分包含在主显示单元(11)的文本格式化处理器(14)中。

    Communication bit pattern detection circuit
    5.
    发明公开
    Communication bit pattern detection circuit 失效
    Kommunikations-Bitmustererkennungsschaltung。

    公开(公告)号:EP0248989A2

    公开(公告)日:1987-12-16

    申请号:EP87104573.8

    申请日:1987-03-27

    IPC分类号: G06F7/02

    CPC分类号: G06F7/02 G06F2207/025

    摘要: A communication bit pattern detection circuit that provides an output signal upon the occurrence of one of several predefined bit patterns for a series of a specified number of bits for a multiple of input signals where each input signal is a continuous stream of serial bit data. The communication bit pattern detection circuit includes a detection stage (39) having combinational logic connected to receive the input signals and providing the logically combined bits to latches (34,46,50,58) of a shift register. The number of latches in the shift register is less than the specified number of bits for the predefined bit patterns. The output of these latches are provided to a logic stage (63) that includes additional combinational logic that provides a nondetection signal. This nondetection signal is provided to indicate that the bits received are not part of any of the predefined bit patterns. The nondetection signal is input to reset a counter (70). The output of the counter is decoded to provide a signal when the counter counts to the specified number of bits in the predefined bit patterns.

    摘要翻译: 一种通信位模式检测电路,其针对多个输入信号的一系列指定数量的位发生几个预定义位模式中的一个,以提供输出信号,其中每个输入信号是串行位数据的连续流。 通信位模式检测电路包括具有组合逻辑的检测级(39),用于接收输入信号,并将逻辑组合位提供给移位寄存器的锁存器(34,46,50,58)。 移位寄存器中的锁存器数量小于预定义位模式的指定位数。 这些锁存器的输出被提供给包括提供非检测信号的附加组合逻辑的逻辑级(63)。 该非检测信号被提供以指示所接收的比特不是任何预定义比特模式的一部分。 输入非检测信号以复位计数器(70)。 当计数器计数到预定义位模式中指定位数时,计数器的输出被解码以提供信号。

    Communication bit pattern detection circuit
    7.
    发明公开
    Communication bit pattern detection circuit 失效
    通信位图案检测电路

    公开(公告)号:EP0248989A3

    公开(公告)日:1990-07-04

    申请号:EP87104573.8

    申请日:1987-03-27

    IPC分类号: G06F7/02

    CPC分类号: G06F7/02 G06F2207/025

    摘要: A communication bit pattern detection circuit that provides an output signal upon the occurrence of one of several predefined bit patterns for a series of a specified number of bits for a multiple of input signals where each input signal is a continuous stream of serial bit data. The communication bit pattern detection circuit includes a detection stage (39) having combinational logic connected to receive the input signals and providing the logically combined bits to latches (34,46,50,58) of a shift register. The number of latches in the shift register is less than the specified number of bits for the predefined bit patterns. The output of these latches are provided to a logic stage (63) that includes additional combinational logic that provides a nondetection signal. This nondetection signal is provided to indicate that the bits received are not part of any of the predefined bit patterns. The nondetection signal is input to reset a counter (70). The output of the counter is decoded to provide a signal when the counter counts to the specified number of bits in the predefined bit patterns.