RADAR DEVICE
    1.
    发明公开
    RADAR DEVICE 审中-实审

    公开(公告)号:EP4407338A1

    公开(公告)日:2024-07-31

    申请号:EP23194689.8

    申请日:2023-08-31

    发明人: YOSHIDA, Hiroshi

    摘要: According to one arrangement, a radar device includes an oscillator (12) configured to generate a reference signal, a first unit group, and a second unit group. The first unit group includes first and second units (101,1, 102,1) configured to transmit/receive based on a reference signal. The second unit group includes third and fourth units (101,2, 102,2) configured to transmit/receive based on the reference signal. The first and third units (101,1, 101,2) are connected to the oscillator (12) via first and second signal lines (L1, L2), respectively. The second and fourth units (102,1, 102,2) are connected to the first and third units (101,1, 101,2) via third and fourth signal lines, respectively.

    ANTENNA DEVICE
    2.
    发明公开
    ANTENNA DEVICE 审中-实审

    公开(公告)号:EP4404385A1

    公开(公告)日:2024-07-24

    申请号:EP23189211.8

    申请日:2023-08-02

    摘要: According to one embodiment, an antenna device includes a first antenna and a second antenna. The first antenna includes a first substrate and a plurality of first elements. The first substrate includes a first face along a first direction and a second direction. The plurality of first elements are arranged along the second direction. The second antenna includes a second substrate and a plurality of second elements. The second substrate includes a second face along the first direction and a third direction. The plurality of second elements are arranged along the third direction. The third direction crosses a plane including the first direction and the second direction. One of the plurality of first elements overlaps the second substrate in the third direction.

    SEMICONDUCTOR DEVICE
    4.
    发明公开

    公开(公告)号:EP4228005A1

    公开(公告)日:2023-08-16

    申请号:EP22184008.5

    申请日:2022-07-11

    摘要: According to one embodiment, a semiconductor device (100) includes first and second electrodes (41, 42), first to third semiconductor regions (1 to 3), a conductive body (10), and a gate electrode (30). The first semiconductor region is located on the first electrode and electrically connected with the first electrode. The second semiconductor region is located on the first semiconductor region. The third semiconductor region is located on a portion of the second semiconductor region. The conductive body is located in the first semiconductor region with an insulating part (21) interposed. A lower surface of the conductive body includes first and second surfaces (S1, S2). The gate electrode is located in the insulating part. The gate electrode faces the second semiconductor region via a gate insulating layer (31). The second electrode is located on the second and third semiconductor regions. The second electrode is electrically connected with the second and third semiconductor regions.