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    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    1.
    发明公开
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
    的非易失性半导体存储器件

    公开(公告)号：EP2308084A1

    公开(公告)日：2011-04-13

    申请号：EP09794154.6

    申请日：2009-07-01

    申请人： Kabushiki Kaisha Toshiba

    发明人： FUKUZUMI, Yoshiaki ,  TANAKA, Hiroyasu ,  KOMORI, Yosuke ,  ISHIDUKI, Megumi ,  KITO, Masaru ,  AOCHI, Hideaki ,  KATSUMATA, Ryota ,  KIDOH, Masaru

    IPC分类号： H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

    CPC分类号： H01L29/7926 ,  G11C16/0466 ,  H01L27/11565 ,  H01L27/11578 ,  H01L27/11582

    摘要： A nonvolatile semiconductor memory device with charge storage layers with high reliability is provided. A plurality of insulating films and a plurality of electrode films 14 are alternately stacked on a substrate 11, and a plurality of selection gate electrodes 17 extending in the X direction and a plurality of bit lines BL extending in the Y direction are provided thereon. U-shaped silicon members 33 are provided, each of which is constituted by a plurality of silicon pillars 31 passing through the electrode films 14 and the selection gate electrode 17, whose upper ends are connected to the bit lines BL, and a connective member 32 connecting lower parts of one pair of the silicon pillars 31 disposed in diagonal positions. The electrode film 14 of each layer is divided for the respective selection gate electrodes 17. One pair of the silicon pillars 31 connected to one another through the connective member 32 are caused to pass through the different electrode films 14 and the different selection gate electrodes 17. All of the U-shaped silicon members 33 connected commonly to one bit line BL are commonly connected to another bit line BL.

    SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
    7.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    HERSBLEITERSPEICHERVORRICHTUNG UND HERSTELLUNGSVERFAHRENDAFÜR

    公开(公告)号：EP2136398A1

    公开(公告)日：2009-12-23

    申请号：EP08739821.0

    申请日：2008-04-03

    申请人： Kabushiki Kaisha Toshiba

    发明人： TANAKA, Hiroyasu ,  KATSUMATA, Ryota ,  AOCHI, Hideaki ,  KIDO, Masaru ,  KITO, Masaru ,  SATO, Mitsuru

    IPC分类号： H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

    CPC分类号： H01L29/792 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/11548 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/7881 ,  H01L29/7926

    摘要： The semiconductor memory device of the present invention includes a plurality of memory strings having a plurality of electrically reprogrammable memory cells connected in series, the memory strings having a column shaped semiconductor, a first insulation film formed around the column shaped semiconductor, a charge accumulation layer formed around the first insulation film, a second insulation film formed around the charge accumulation film and a plurality of electrodes formed around the second insulation film, a bit line connected to one end of the memory strings via a plurality of selection transistors, and a conducting layer extending in two dimensions and in which the plurality of electrodes of the memory strings and the plurality of electrodes of different memory strings are shared respectively, wherein each end part of the conducting layer is formed in step shapes in a direction parallel with the bit line.

    摘要翻译： 本发明的半导体存储器件包括具有串联连接的多个电可再编程存储器单元的多个存储器串，具有列形半导体的存储器串，形成在柱状半导体周围的第一绝缘膜，电荷累积层 形成在第一绝缘膜周围，形成在电荷累积膜周围的第二绝缘膜和围绕第二绝缘膜形成的多个电极，经由多个选择晶体管连接到存储器串的一端的位线，以及导电 分别在存储器串的多个电极和不同的存储器串的多个电极中分别共享，其中导电层的每个端部在与位线平行的方向上形成为台阶形状 。