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21 条记录 (耗时 0.015 秒)

    Field-emission electron source and method of manufacturing the same
    2.
    发明公开
    Field-emission electron source and method of manufacturing the same 失效
    场发射电子源及其制造方法

    公开(公告)号：EP0939418A2

    公开(公告)日：1999-09-01

    申请号：EP99108499.7

    申请日：1997-04-15

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： Koga, Keisuke ,  Hori, Yoshikazu ,  Yoshida, Takehito ,  Yamada, Yuka

    IPC分类号： H01J1/30 ,  H01J9/02

    CPC分类号： H01J9/025 ,  H01J2201/30426

    摘要： A withdrawn electrode is formed on a silicon substrate with intervention of upper and lower silicon oxide films each having circular openings corresponding to regions in which cathodes are to be formed. Tower-shaped cathodes are formed in the respective openings of the upper and lower silicon oxide films and of the withdrawn electrode. Each of the cathodes has a sharply tapered tip portion having a radius of 2 nm or less, which has been formed by crystal anisotropic etching and thermal oxidation process for silicon. The region of the silicon substrate exposed in the openings of the upper and lower silicon oxide films and the cathode have their surfaces coated with a thin surface coating film made of a material having a low work function.

    Field-emission electron source and method of manufacturing the same
    3.
    发明公开
    Field-emission electron source and method of manufacturing the same 失效
    Feldemissionselektronenquelle和seine Herstellungsverfahren

    公开(公告)号：EP0802555A2

    公开(公告)日：1997-10-22

    申请号：EP97106185.8

    申请日：1997-04-15

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： Koga, Keisuke ,  Hori, Yoshikazu ,  Yoshida, Takehito ,  Yamada, Yuka

    IPC分类号： H01J1/30 ,  H01J9/02

    CPC分类号： H01J9/025 ,  H01J2201/30426

    摘要： A withdrawn electrode is formed on a silicon substrate with intervention of upper and lower silicon oxide films each having circular openings corresponding to regions in which cathodes are to be formed. Tower-shaped cathodes are formed in the respective openings of the upper and lower silicon oxide films and of the withdrawn electrode. Each of the cathodes has a sharply tapered tip portion having a radius of 2 nm or less, which has been formed by crystal anisotropic etching and thermal oxidation process for silicon. The region of the silicon substrate exposed in the openings of the upper and lower silicon oxide films and the cathode have their surfaces coated with a thin surface coating film made of a material having a low work function.

    摘要翻译： 引入电极形成在硅衬底上，介于上和下氧化硅膜之间，每个氧化硅膜具有对应于其中将形成阴极的区域的圆形开口。 塔形阴极形成在上，下氧化硅膜和引出电极的各个开口中。 每个阴极具有通过晶体各向异性蚀刻和硅的热氧化工艺形成的具有2nm或更小的半径的尖锐尖端部分。 在上下氧化硅膜和阴极的开口中暴露的硅衬底的表面的表面涂覆有由具有低功函数的材料制成的薄表面涂膜。

    A method of fabricating a field emitter
    5.
    发明公开
    A method of fabricating a field emitter 失效
    Verfahren zur Herstellung einer Feldemissionsanordnung。

    公开(公告)号：EP0637050A2

    公开(公告)日：1995-02-01

    申请号：EP94111066.0

    申请日：1994-07-15

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： Hori, Yoshikazu ,  Koga, Keisuke

    IPC分类号： H01J9/02 ,  H01J1/30

    CPC分类号： H01J1/3042 ,  H01J9/025 ,  H01J2201/319

    摘要： The invention is a field-emission element having a cathode with a sharp apex and a gate with an aperture diameter less than 1 µm that is fabricated by covering a silicon substrate with a silicon oxide layer, forming an etching mask of 1.0 µm diameter from a silicon oxide layer by photolithography, wet-etching the etching mask to form a minute etching mask of less diameter, dry etching the substrate to form a cylindrical solid structure, followed by anisotropic etching to form a couple of minute conical-shaped structures facing each other and connected by their respective tops, vacuum evaporating around the minute structures an insulating layer and thereon a conducting layer for use as a gate electrode, and etching the minute structure to lift off the upper part of the minute conical shaped structures.

    摘要翻译： 本发明是具有尖锐尖端的阴极和孔径小于1μm的栅极的场发射元件，其通过用硅氧化物层覆盖硅衬底制成，形成直径为1.0μm的蚀刻掩模 通过光刻从氧化硅层，湿蚀刻蚀刻掩模以形成较小直径的微小蚀刻掩模，干蚀刻基板以形成圆柱形固体结构，随后进行各向异性蚀刻以形成面对的微小锥形结构 彼此连接并通过其各自的顶部连接，在微小结构周围真空蒸发绝缘层，并在其上形成用作栅电极的导电层，并且蚀刻微小结构以剥离微小锥形结构的上部。

    Apparatus for controlling relation in position between a photomask and a wafer
    6.
    发明公开
    Apparatus for controlling relation in position between a photomask and a wafer 失效
    Vorrichtung zur Kontrolle desLageverhältnisseszwischen einer Photomaske und einemPlättchen。

    公开(公告)号：EP0309281A2

    公开(公告)日：1989-03-29

    申请号：EP88308878.3

    申请日：1988-09-23

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： Sato, Takeo ,  Aoki, Shinichiro ,  Yamaguchi, Katsumasa ,  Kaneko, Tadashi ,  Nomura, Noboru ,  Koga, Keisuke ,  Yamashita, Kazuhiro

    IPC分类号： H01L21/00

    CPC分类号： G03F9/7065 ,  G03F9/7049 ,  H01L21/682

    摘要： A system for controlling the relation in position between a photomask and a wafer for use in manufacturing apparatus of a highly integrated circuit such as large scale integration (LSI). The position control system includes a coherent light source for generating two light beams which are different in frequency and polarizing direction from each other. The light beams from the coherent light source is introduced into a first diffraction grating and the diffracted light from the first diffraction grating selectively pass through a telecentric lens system and are led to second and third diffraction gratings respectively disposed on the photomask and the wafer. Light beat signals are obtained in correspondance with the diffracted light from the second and third diffraction gratings and the position relation between the photomask and wafer is controlled on the basis of the phase difference between the obtained light beat signals which corresponds to the position difference between the photomask and the wafer.

    摘要翻译： 一种用于控制在诸如大规模集成（LSI）的高度集成电路的制造装置中使用的光掩模和晶片之间的位置关系的系统。 位置控制系统包括相干光源，用于产生频率和偏振方向彼此不同的两个光束。 来自相干光源的光束被引入到第一衍射光栅中，并且来自第一衍射光栅的衍射光选择性地通过远心透镜系统，并被引导到分别设置在光掩模和晶片上的第二和第三衍射光栅。 根据来自第二和第三衍射光栅的衍射光获得光拍信号，并且基于获得的光拍信号之间的相位差来控制光掩模和晶片之间的位置关系，该相位差对应于第二和第三衍射光栅之间的位置差 光掩模和晶片。