摘要:
An automatic phase control apparatus for controlling the frequency of a sine wave produced from a variable frequency oscillator (6) to be equal to that of the carrier wave of the extracted chrominance signal. A phase difference detector 4 detects a phase difference between the sine wave and the carrier wave. The detected phase difference is integrated to obtain an integrated value which is applied to the frequency oscillator for determining the oscillation frequency. A deviation detector (9; 10) is provided for detecting a deviation of the integrated value with respect to an expected frequency control data calculated by a calculator (8). When the deviation is greater than a predetermined range, the integrated value is replaced with the calculated data.
摘要:
The invention relates to a reproducing method of reproducing data from tracks recording signals interleaves over plural tracks, storing the reproduced data, processing the stored data by error correction, issuing an error correction disable signal in the case of data processing impossible to correct in this error correction process, and controlling so as not to issue data in the track having interleaving relation with the data delivering this error correction disable signal, and a reproducing apparatus and a recording and reproducing apparatus using this method, and onlv bv adding the function for controlling the data to be issued on the basis of the result of detection of error correction disable, stable reproduction free from reproduction of largely objectionable image due to error can be realized.
摘要:
An automatic phase control apparatus for controlling the frequency of a sine wave produced from a variable frequency oscillator (6) to be equal to that of the carrier wave of the extracted chrominance signal. A phase difference detector 4 detects a phase difference between the sine wave and the carrier wave. The detected phase difference is integrated to obtain an integrated value which is applied to the frequency oscillator for determining the oscillation frequency. A deviation detector (9; 10) is provided for detecting a deviation of the integrated value with respect to an expected frequency control data calculated by a calculator (8). When the deviation is greater than a predetermined range, the integrated value is replaced with the calculated data.
摘要:
The invention relates to a reproducing method of reproducing data from tracks recording signals interleaves over plural tracks, storing the reproduced data, processing the stored data by error correction, issuing an error correction disable signal in the case of data processing impossible to correct in this error correction process, and controlling so as not to issue data in the track having interleaving relation with the data delivering this error correction disable signal, and a reproducing apparatus and a recording and reproducing apparatus using this method, and onlv bv adding the function for controlling the data to be issued on the basis of the result of detection of error correction disable, stable reproduction free from reproduction of largely objectionable image due to error can be realized.
摘要:
A reproduced signal from a recording medium 1 is equalized at partial response (1, 0, -1) by a reproducing equalizer 3, and is converted into a reproduced and equalized signal. A clock reproducing circuit 4 issues a reproduced clock synchronized with the timing of data identification, and applies it to a phase adjusting circuit 5. A phase control signal generating circuit 6A detects a specific pattern from a reproduced digital signal issued from an A/D converter 7, and the advance or delay amount of phase of the reproduced clock is detected by the amplitude or distribution of the sampling value. This phase deviation amount is given to the phase adjusting circuit 5 as a phase control signal. The phase adjusting circuit 5 given a delayed clock to the A/D converter 7, and controls to A/D convert the reproduced signal at correct timing.
摘要:
A reproduced signal from a recording medium 1 is equalized at partial response (1, 0, -1) by a reproducing equalizer 3, and is converted into a reproduced and equalized signal. A clock reproducing circuit 4 issues a reproduced clock synchronized with the timing of data identification, and applies it to a phase adjusting circuit 5. A phase control signal generating circuit 6A detects a specific pattern from a reproduced digital signal issued from an A/D converter 7, and the advance or delay amount of phase of the reproduced clock is detected by the amplitude or distribution of the sampling value. This phase deviation amount is given to the phase adjusting circuit 5 as a phase control signal. The phase adjusting circuit 5 given a delayed clock to the A/D converter 7, and controls to A/D convert the reproduced signal at correct timing.