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    Apparatus and method for decoding variable-length code
    3.
    发明公开
    Apparatus and method for decoding variable-length code 失效
    Vorrichtung und Verfahren zur Dekodierung von Koden variablerLänge。

    公开(公告)号：EP0665653A2

    公开(公告)日：1995-08-02

    申请号：EP95100985.1

    申请日：1995-01-25

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： Takeno, Hiroshi ,  Miyagoshi, Eiji ,  Imanishi, Hiroshi ,  Nakatani, Shintarou ,  Akiyama, Toshihide

    IPC分类号： H03M7/42

    CPC分类号： H03M7/425

    摘要： 5 n7 A variable-length-code decoder of this invention decodes an input bit stream including an input bit string having a codeword of a fixed-length code and a plurality of codewords of variable-length codes combined in a predetermined format. The decoder includes: a shifter for shifting the input bit string by a desired number of bits; a pattern detector for detecting a specific pattern in the bit string, and outputting a detection signal; two code tables provided for the respective variable-length codes, each code table having the length of each codeword (codeword length) and the decoded-word corresponding to the codeword, and outputting a codeword length and a decoded-word of a corresponding codeword based on the bit string output from the shifter; a processor for storing the format of the input bit string, outputting the length of the fixed-length code and decoded data of the fixed-length code, and selecting, for each of the variable-length codewords, one of the code tables to which the variable-length codeword belongs to, based on the detection signal and the format; a codelength selector for selecting the codeword length or the fixed-length code, and for setting the shift amount for the input bit string in the shifter; and an output circuit for selectively outputting the decoded-word or the decoded data.

    摘要翻译： 本发明的可变长度码解码器对包括具有固定长度码的码字和以预定格式组合的可变长度码的多个码字的输入比特串进行解码输入比特流。 解码器包括：移位器，用于将输入位串移位所需位数; 用于检测比特串中的特定模式的模式检测器，并输出检测信号; 为每个可变长度码提供两个码表，每个码表具有每个码字的长度（码字长度）和与码字对应的解码字，并输出码字长度和相应码字的解码字 对来自移位器的位串输出; 用于存储输入比特串的格式的处理器，输出固定长度码的长度和固定长度码的解码数据，并且对于每个可变长度码字，选择一个码表，其中 可变长度码字基于检测信号和格式属于; 用于选择码字长度或固定长度码的码长选择器，以及用于设置移位器中输入比特串的移位量; 以及用于选择性地输出解码字或解码数据的输出电路。