公开(公告)号：EP3210209A4

公开(公告)日：2018-05-16

申请号：EP15852706

申请日：2015-10-07

申请人： MICRON TECHNOLOGY INC

发明人： PAN FENG ,  PARK JAEKWAN ,  GHODSI RAMIN

IPC分类号： G11C8/12 ,  G11C11/56 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24

CPC分类号： G11C16/0483 ,  G11C8/12 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/26

摘要： Apparatuses and methods for segmented SGS lines are described. An example apparatus may include first and second pluralities of memory subblocks of a memory block. The apparatus may include a first select gate control line associated with the first plurality of memory subblocks and a second select gate control line associated with the second plurality of memory subblocks. The first select gate control line may be coupled to a first plurality of select gate switches of the first plurality of memory subblocks. The second select gate control line may be coupled to a second plurality of select gate switches of the second plurality of memory subblocks. The first and second pluralities of select gate switches may be coupled to a source. The apparatus may include a plurality of memory access lines associated with each the first and second pluralities of memory subblocks.