RECESSED GATE DRAM TRANSISTOR AND METHOD
    2.
    发明公开
    RECESSED GATE DRAM TRANSISTOR AND METHOD 审中-公开
    DRAM晶体管栅极埋入和方法

    公开(公告)号:EP1382059A2

    公开(公告)日:2004-01-21

    申请号:EP02731519.1

    申请日:2002-04-26

    IPC分类号: H01L21/00

    摘要: A method of forming memory devices, such as DRAM access transistors, having recessed gate structures is disclosed. Field oxide areas for isolation are first formed over a semiconductor substrate subsequent to which transistor grooves are patterned and etched in a silicon nitride layer. The field oxide areas adjacent to the transistor grooves are then recessed, so that subsequently deposited polysilicon for gate structure formation can be polished relative to the adjacent and elevated silicon nitride.