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公开(公告)号：EP2798639A1
公开(公告)日：2014-11-05
申请号：EP13731652.7
申请日：2013-01-08
申请人： Mosys, Inc.
IPC分类号： G11C29/12
CPC分类号： G06F11/2094 , G06F11/106 , G11C29/06 , G11C29/12 , G11C29/16 , G11C29/42 , G11C29/44 , G11C29/4401 , G11C29/50 , G11C29/808 , G11C2029/0409
摘要： A memory device with background built-in self-testing (BBIST) includes a plurality of memory blocks; a memory buffer to offload data from one of the plurality of memory blocks temporarily; and a memory block stress controller to control a stress test applied to the one of the memory blocks when the data is temporarily offloaded on the memory buffer. The stress test tests for errors in the one of the plurality of the memory blocks.
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公开(公告)号：EP2532110B1
公开(公告)日：2014-01-15
申请号：EP11737631.9
申请日：2011-01-27
申请人： Mosys, Inc.
CPC分类号： H04L1/1607 , H04L2001/0096 , H04L2001/125
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公开(公告)号：EP2532110A2
公开(公告)日：2012-12-12
申请号：EP11737631.9
申请日：2011-01-27
申请人： Mosys, Inc.
CPC分类号： H04L1/1607 , H04L2001/0096 , H04L2001/125
摘要： An apparatus includes a receiver, an error detection unit, and an acknowledgement unit. The receiver may receive frames of data from a transmitter unit of a second apparatus via a first communication path. The error detection unit may detect data errors in the frames of data received via the first communication path. The acknowledgment unit may maintain an acknowledgement indicator indicative of whether frames received by the apparatus are error free. In response to the error detection unit detecting an error, the acknowledgement unit may indicate an error condition exists by freezing a value of the acknowledgement indicatoi-. or alternatively the acknowledgement unit may set a current value of the acknowledgement indicator to a predetermined error value. Further, the apparatus may successively convey values of the acknowledgement indicator to the second apparatus via a second communication path while the apparatus is receiving frames.
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