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1.发明公开METHOD AND DEVICE FOR AUTOMATICALLY EXCHANGING SIGNALS BETWEEN EMBEDDED MULTI-CPU BOARDS 审中-公开方法和设备自动信号交换集成电路之间与几个中央处理单元
公开(公告)号：EP3062232A1
公开(公告)日：2016-08-31
申请号：EP14872661.5
申请日：2014-11-12
发明人： FENG, Yadong , ZHOU, Qiang , XU, Dongfang , YUAN, Tao , ZHAO, Tianen , LI, Guanghua , WEN, Jifeng , CHEN, Hongjun , LIU, Kejin
IPC分类号： G06F15/163
CPC分类号： G06F13/362 , G06F13/4282 , G06F15/17 , G06F17/50
摘要： The present invention discloses a signal name based method for automatic signal exchange between multiple embedded CPU boards, including the following steps: dividing CPU boards into master board and slave board, where during an initialization phase, each slave board sends signal registration information to the master board; after the master board collects the signal registration information of all the slave boards, reading, from a configuration file, an exchange relationship between an output signal and an input signal that is represented by a connection line between signal names, calculating and allocating a data bus address to which the output signal and the input signal are mapped, and sending memory addresses, data types, and bus addresses of signals to each slave board; after a slave board receives the memory addresses, the data types, and the bus addresses of the signals from the master board, saving same as output signal tables and input signal tables; and during an operation phase, writing, by a signal sender, a value of an output signal into a corresponding bus address according to the output signal tables, and reading, by a receiver, a value of an input signal from a corresponding bus address according to the input signal tables. With this method, signal exchange between CPU boards may be intuitively and simply adjusted, and the correctness of signal exchange is ensured. The present invention further provides an apparatus for implementing automatic signal exchange.
摘要翻译： 本发明盘松动多个嵌入式CPU板，其包括以下步骤之间的自动信号交换的信号名称为基础的方法：将CPU板到母板和从板，在初始化阶段，其中期间，每个从板发送信号的注册信息到主 板; 主电路板后收集所有从属板的信号的注册信息，在输出信号之间输入信号上交换关系阅读，从配置文件并通过信号名称之间的连接线表示，计算和分配的数据总线 哪个地址到输出信号和输入信号被映射，并发送存储器地址，数据类型，和信号到每个从板总线地址; 从板之后接收的存储器地址，数据类型，并且从所述主电路板的信号的总线地址，节省相同输出信号表和输入信号表; 和期间，在操作阶段，写入由信号发送器的输出信号的雅丁到输出信号表的值转换成相应的总线地址，并读出，由一接收器中，输入信号的从相应的总线地址gemäß的值 于输入信号的表。 利用该方法，CPU板之间的信号交换可以直观地和简单地调节，和信号交换的正确性得以保证。 本发明进一步提供到用于实现自动信号交换。
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公开(公告)号：EP3062232B1
公开(公告)日：2018-08-22
申请号：EP14872661.5
申请日：2014-11-12
发明人： FENG, Yadong , ZHOU, Qiang , XU, Dongfang , YUAN, Tao , ZHAO, Tianen , LI, Guanghua , WEN, Jifeng , CHEN, Hongjun , LIU, Kejin
IPC分类号： G06F15/163 , G06F17/50
CPC分类号： G06F13/362 , G06F13/4282 , G06F15/17 , G06F17/50
摘要： The present invention discloses a signal name based method for automatic signal exchange between multiple embedded CPU boards, including the following steps: dividing CPU boards into master board and slave board, where during an initialization phase, each slave board sends signal registration information to the master board; after the master board collects the signal registration information of all the slave boards, reading, from a configuration file, an exchange relationship between an output signal and an input signal that is represented by a connection line between signal names, calculating and allocating a data bus address to which the output signal and the input signal are mapped, and sending memory addresses, data types, and bus addresses of signals to each slave board; after a slave board receives the memory addresses, the data types, and the bus addresses of the signals from the master board, saving same as output signal tables and input signal tables; and during an operation phase, writing, by a signal sender, a value of an output signal into a corresponding bus address according to the output signal tables, and reading, by a receiver, a value of an input signal from a corresponding bus address according to the input signal tables. With this method, signal exchange between CPU boards may be intuitively and simply adjusted, and the correctness of signal exchange is ensured. The present invention further provides an apparatus for implementing automatic signal exchange.
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公开(公告)号：EP4170979A1
公开(公告)日：2023-04-26
申请号：EP21826716.9
申请日：2021-04-16
发明人： LIN, Qing , WEN, Jifeng , ZHAO, Qingchun , HU, Shaoqian , TANG, Zhenyu , ZHOU, Qiang , LIU, Minghui
IPC分类号： H04L12/42
摘要： The present invention provides a control system based on a crossed multi-ring-network redundant network topology structure. The control system includes: a control object having a plurality of groups of first connection nodes; and a plurality of controlled objects, each of the plurality of controlled objects having one or a plurality of groups of second connection nodes, wherein any one of the plurality of groups of first connection nodes in the control object are sequentially connected to the second connection nodes of at least two of the plurality of controlled objects to form a ring network, the plurality of groups of first connection nodes corresponding to the control object form a plurality of ring networks, and the plurality of ring networks include the plurality of controlled objects. According to the control system in the present invention, the connection nodes of the control object can be connected to the plurality of controlled objects to form the ring networks, such that the number of the connection nodes of the control object can be effectively reduced, thereby reducing the power consumption of the control object. Moreover, since there are redundant connections between the control object and the controlled objects in the control system, the reliability of the whole control system is improved.
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公开(公告)号：EP3525094A1
公开(公告)日：2019-08-14
申请号：EP17862886.3
申请日：2017-05-26
发明人： CHEN, Hongjun , ZHOU, Qiang , WEN, Jifeng , LI, Jiuhu , XU, Dongfang , LI, Guanghua , LIU, Wei , LI, Dewen , ZHOU, Lei , ZHAO, Tianen
IPC分类号： G06F9/455
摘要： Disclosed by the present invention are a running method for an embedded type virtual device and a system, an embedded type device being divided into a managing process, a plurality of real-time modules and a plurality of non-real-time modules. The managing process reading a configuration file, loading real-time and non-real-time module libraries of each processor and completing initialization interaction by means of a virtual controller area network (CAN) bus and first in, first out (FIFO) communication. The managing process starting a real-time thread and serially scheduling real-time task according to a task period setting relation. The managing process starting a plurality of non-real-time threads, calling a period task of a non-real-time module and carrying out parallel communication with a plurality of debugging clients. The real-time modules exchange data with each other by means of a virtual data bus, and the real-time modules exchange data with the non-real-time modules by means of a sharing memory.
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