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公开(公告)号：EP3402146A1
公开(公告)日：2018-11-14
申请号：EP17813006.8
申请日：2017-04-13
发明人： YAMAZAKI, Etsushi , NOUCHI, Hiroyuki , ONUMA, Yasuharu , TAKAMUKU, Tomohiro , OYAMA, Katsuichi , TAKEI, Kazuhito , TOMIZAWA, Masahito , KISAKA, Yoshiaki , YOSHIDA, Mitsuteru , NAKAMURA, Masanori
摘要： A symbol phase difference compensating portion (6) calculates a first phase difference which is a phase difference between a known pattern extracted from a received signal and a true value of the known pattern and performs phase compensation for the received signal based on the first phase difference. A tentative determination portion (12) tentatively determines an output signal of the symbol phase difference compensating portion (6) to acquire an estimated value of a phase. A first phase difference acquiring portion (13) acquires a second phase difference which is a phase difference between a phase of the output signal and the estimated value of the phase acquired by the tentative determination portion (12). A first phase difference compensating portion (14) performs phase compensation for the output signal based on the second phase difference.
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公开(公告)号：EP3276873B1
公开(公告)日：2019-11-27
申请号：EP17762697.5
申请日：2017-01-16
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公开(公告)号：EP3435562B1
公开(公告)日：2020-09-16
申请号：EP17845847.7
申请日：2017-06-21
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公开(公告)号：EP3435562A1
公开(公告)日：2019-01-30
申请号：EP17845847.7
申请日：2017-06-21
发明人： ONUMA, Yasuharu , YAMAZAKI, Etsushi , TAKAMUKU, Tomohiro , TACHIBANA, Masahiro , YOSHIDA, Mitsuteru , TOMIZAWA, Masahito , OKAMOTO, Seiji
摘要： Fourier transform is performed on a reception signal to obtain a first calculation value. Fourier transform is performed on a known signal to obtain a second calculation value. The first calculation value is divided by the second calculation value to obtain a third calculation value. Inverse Fourier transform is performed on the third calculation value to obtain a fourth calculation value. A maximum value of an amplitude of the fourth calculation value and a sample point at which the maximum value is obtained are detected. The position of the known signal in the reception signal is detected from the sample point at which the maximum value is obtained.
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5.发明公开
公开(公告)号：EP3258598A1
公开(公告)日：2017-12-20
申请号：EP17757454.8
申请日：2017-01-16
发明人： ONUMA, Yasuharu , YAMAZAKI, Etsushi , TAKEI, Kazuhito , ISHIDA, Osamu , HORIKOSHI, Kengo , YOSHIDA, Mitsuteru , KISAKA, Yoshiaki , TOMIZAWA, Masahito
CPC分类号： H03H17/0227 , H03H17/00 , H03H17/0213 , H03H17/06 , H03H2017/0214 , H03H2017/0245 , H03H2017/0298 , H04L7/0029 , H04L7/0087
摘要： A parallel transfer rate converter (4) inputs first parallel data with number of samples being S1 pieces in synchronism with a first clock, and outputs second parallel data with number of samples being S2=S1×(m/p) pieces (p is an integer equal to or larger than 1) in synchronism with a second clock having a frequency which is p/m times of a frequency of the first clock. A convolution operation device (5) inputs the second parallel data in synchronism with the second clock, generates third parallel data with number of samples being S3=S2×(n/m) pieces (S3 is an integer equal to or larger than 1) by executing a convolution operation with a coefficient indicating a transmission characteristic to the second parallel data, and outputs the third parallel data in synchronism with the second clock.
摘要翻译： 并行传送速率转换器（4）输入与第一时钟同步的具有S1个样本数的第一并行数据，并输出样本数为S2 = S1×（m / p）个片（p是 整数等于或大于1）与频率为第一时钟的频率的p / m倍的第二时钟同步。 卷积运算装置（5）与第2时钟同步地输入第2并行数据，生成样本数为S3 = S2×（n / m）个（S3为1以上的整数）的第3并行数据， 通过使用指示对第二并行数据的传输特性的系数执行卷积运算，并且与第二时钟同步地输出第三并行数据。
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公开(公告)号：EP3435608A1
公开(公告)日：2019-01-30
申请号：EP17845848.5
申请日：2017-06-21
发明人： ONUMA, Yasuharu , YAMAZAKI, Etsushi , NOUCHI, Hiroyuki , TAKAMUKU, Tomohiro , OYAMA, Katsuichi , TAKEI, Kazuhito , NAKAMURA, Masanori , YOSHIDA, Mitsuteru , TOMIZAWA, Masahito
IPC分类号： H04L27/01 , H04B10/2507 , H04B10/60 , H04L27/06
摘要： An I component compensation unit (15) calculates an I component in which a distortion has been compensated, by forming a first polynomial expressing the distortion of the I component based on an I component and a Q component of a quadrature modulation signal and multiplying each term of the first polynomial by a first coefficient. A Q component compensation unit (16) calculates a Q component in which a distortion has been compensated, by forming a second polynomial expressing the distortion of the Q component based on the I component and the Q component of the quadrature modulation signal and multiplying each term of the second polynomial by a second coefficient. A coefficient calculation unit (17) calculates the first and second coefficients by comparing outputs of the I component compensation unit (15) and the Q component compensation unit (16) and a known signal.
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公开(公告)号：EP3402146B1
公开(公告)日：2020-10-07
申请号：EP17813006.8
申请日：2017-04-13
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公开(公告)号：EP3432488B1
公开(公告)日：2020-05-13
申请号：EP17813119.9
申请日：2017-05-26
发明人： TAKAMUKU, Tomohiro , YAMAZAKI, Etsushi , OYAMA, Katsuichi , ONUMA, Yasuharu , TAKEI, Kazuhito , NAKAMURA, Masanori , YOSHIDA, Mitsuteru , TOMIZAWA, Masahito , KISAKA, Yoshiaki
IPC分类号： H04B10/2507 , H04B3/10 , H04B10/61 , H04L27/01
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公开(公告)号：EP3550728A1
公开(公告)日：2019-10-09
申请号：EP17897709.6
申请日：2017-12-15
发明人： YOSHIDA, Mitsuteru , ENDO, Yasuyuki , YAMAZAKI, Etsushi , OYAMA, Katsuichi , ONUMA, Yasuharu , TOMIZAWA, Masahito
摘要： A plurality of error correction circuits corrects errors of the data transmitted through the plurality of transmission lines. A combining portion (12) combines the plurality of transmission lines to the plurality of error correction circuits. The plurality of transmission lines includes a first transmission line (I), and a second transmission line (II) having a lower transmission characteristic than the first transmission line. The plurality of error correction circuits includes a first error correction circuit (8a), and a second error correction circuit (8b) having lower error correction capability and power consumption than the first error correction circuit (8a). The combining portion (12) uses a function to combine a plurality of error correction circuits with one transmission path, combines the first transmission line (I) with the second error correction circuit (8b) at a higher rate than the first error correction circuit (8a), and combines the second transmission line (II) with the first error correction circuit (8a) at a higher rate than the second error correction circuit (8b).
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10.发明公开DATA PHASE TRACKING DEVICE, DATA PHASE TRACKING METHOD, AND COMMUNICATION DEVICE 审中-公开数据相位跟踪装置，数据相位跟踪方法和通信装置
公开(公告)号：EP3276873A1
公开(公告)日：2018-01-31
申请号：EP17762697.5
申请日：2017-01-16
发明人： ONUMA, Yasuharu , TACHIBANA, Masahiro , YAMAZAKI, Etsushi , TAKEI, Kazuhito , YOSHIDA, Yuki , IKEDA, Masayuki , KISAKA, Yoshiaki , TOMIZAWA, Masahito
摘要： An FIR filter (7) convolutes sampled data obtained by sampling a reception signal with tap coefficients. A phase difference detector (8) detects a phase difference between a synchronization timing of a signal waveform estimated from an output signal of the FIR filter (7) and a sampling timing of the output signal. A tap coefficient adjuster (9) adjusts the tap coefficients so as to reduce the phase difference detected by the phase difference detector (8) and causes the sampling timing of the output signal of the FIR filter (7) to track the synchronization timing.
摘要翻译： FIR滤波器（7）对通过对具有抽头系数的接收信号进行采样而获得的采样数据进行卷积。 相位差检测器（8）检测从FIR滤波器（7）的输出信号估计的信号波形的同步定时与输出信号的采样定时之间的相位差。 抽头系数调整器（9）调整抽头系数，以减小由相位差检测器（8）检测到的相位差，并使FIR滤波器（7）的输出信号的采样定时跟踪同步定时。
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