公开(公告)号：EP3261363A1

公开(公告)日：2017-12-27

申请号：EP16752447.9

申请日：2016-02-16

申请人： Clarion Co., Ltd.

发明人： HASHIMOTO, Takeshi ,  WATANABE, Tetsuo ,  MORITA, Hideyuki ,  KUMAGAI, Takatomi ,  FUJITA, Yasuhiro ,  FUKUE, Kazutomo

IPC分类号： H04R3/04 ,  H04R3/00 ,  H04S1/00 ,  H04S5/02

CPC分类号： H04R3/14 ,  H03H17/0009 ,  H03H17/0213 ,  H03H17/08 ,  H04R3/00 ,  H04R3/04 ,  H04R2499/13 ,  H04S1/00 ,  H04S3/002 ,  H04S5/02 ,  H04S2420/07

摘要： A phase control signal generation device generating a phase control signal for each of frequency bands for an audio signal converted into a frequency domain, the phase control signal generation device comprising: a setting change means that is able to change setting of a propagation delay time for each of predetermined frequency bands; a difference obtaining means that obtains a difference between propagation delay times before and after setting change; an updating means that updates a phase control amount of the frequency band for which the propagation delay time is changed, based on the obtained difference; and a phase control signal generating means that generates a phase control signal of each frequency band by performing a smoothing process for the phase control amount in a frequency domain using the updated phase control amount.

摘要翻译： 1.一种相位控制信号生成装置，其对于被变换为频域的音频信号，生成每个频带的相位控制信号，所述相位控制信号生成装置的特征在于，具备：设定变更单元， 每个预定频带; 差分取得单元，取得设定变更前后的传播延迟时间之差; 更新部件，基于所获得的差值更新传播延迟时间被改变的频带的相位控制量; 以及相位控制信号生成单元，其使用更新后的相位控制量，对频域的相位控制量进行平滑化处理，生成各频带的相位控制信号。

公开(公告)号：EP3211538A1

公开(公告)日：2017-08-30

申请号：EP15891447.3

申请日：2015-05-08

申请人： Huawei Technologies Co. Ltd.

发明人： ZHUANG, Liang ,  YANG, Ganghua ,  LIANG, Wenliang

IPC分类号： G06F17/14

CPC分类号： H03H17/0213 ,  G06F17/14 ,  G06F17/142 ,  G06F17/147 ,  H03H17/0202 ,  H03H2017/0214

摘要： Embodiments of the present invention provide a signal processing method and apparatus. The method includes: performing M-way filtering on an input signal to obtain M filtered signals, performing extraction on M filtered signals separately to obtain M extracted signals, performing fast Fourier transform FFT on the M extracted signals separately to obtain M frequency-domain signals, and finally determining output signals according to the M frequency-domain signals. According to the embodiments of the present invention, signal filtering and extraction are performed and then FFT is performed. In this way, computation complexity can be reduced.

摘要翻译： 本发明的实施例提供了一种信号处理方法和装置。 该方法包括：对输入信号进行M路滤波，得到M个滤波信号，分别对M个滤波信号进行提取，得到M个提取信号，对M个提取信号分别进行快速傅立叶变换FFT，得到M个频域信号 最后根据M个频域信号确定输出信号。 根据本发明的实施例，执行信号滤波和提取，然后执行FFT。 这样可以减少计算复杂度。

公开(公告)号：EP2920949B1

公开(公告)日：2017-02-01

申请号：EP13826690.3

申请日：2013-12-21

申请人： Microsoft Technology Licensing, LLC

发明人： AHGREN, Per

IPC分类号： H04W52/02 ,  H04M9/08 ,  G10L21/0208 ,  H04R3/00 ,  H03H17/02 ,  H03H17/04

CPC分类号： H04R3/002 ,  G10L2021/02082 ,  H03H17/0213 ,  H03H17/04 ,  H04M9/082 ,  H04W52/0245 ,  Y02D70/1222 ,  Y02D70/168 ,  Y02D70/23

摘要： Method, user device and computer program product for suppressing echo. An audio signal is output from a speaker. A microphone receives an audio signal, wherein the received audio signal includes an echo resulting from said outputted audio signal. A Finite Impulse Response filter estimate ĥ(t) is dynamically adapted in the time domain based on the outputted audio signal and the received audio signal to model an echo path h(t) of the echo in the received audio signal. At least one power response is determined from the filter estimate ĥ(t) and used to estimate the echo power of the echo in the received audio signal. The estimated echo power is used to apply echo suppression to the received audio signal, thereby suppressing the echo in the received audio signal.

摘要翻译： 方法，用户设备和用于抑制回声的计算机程序产品。 从扬声器输出音频信号。 麦克风接收音频信号，其中所接收的音频信号包括由所述输出的音频信号产生的回波。 有限脉冲响应滤波器估计ĥ（t）基于所输出的音频信号和接收到的音频信号在时域中动态地适应，以对所接收的音频信号中的回波的回波路径h（t）进行建模。 从滤波器估计ĥ（t）确定至少一个功率响应，并用于估计所接收的音频信号中的回波的回波功率。 估计的回波功率用于对接收的音频信号应用回波抑制，从而抑制接收到的音频信号中的回波。

公开(公告)号：EP2270981A2

公开(公告)日：2011-01-05

申请号：EP10166373.0

申请日：2010-06-17

申请人： FUJITSU LIMITED

发明人： Kanayama, Yasutaka ,  Koizumi, Nobukazu

IPC分类号： H03H17/02

CPC分类号： H03H17/0213

摘要： A digital signal processing apparatus includes a frame generator configured to generate a plurality of frames from a row of sample data of a time-domain, a part of each frame overlapping with adjoining frames, a Fourier transform unit configured to transform at least one of the generated frames into a frequency domain by Fourier transformation, an addition unit configured to add predetermined frequency characteristic to the transformed frame, and an inverse Fourier transform unit configured to transform the added frame into the time-domain by inverse Fourier transformation and to delete the overlap of the frame of the time-domain transformed.

摘要翻译： 一种数字信号处理装置包括：被配置为产生从时域，与相邻的帧的每个帧的重叠的一部分的采样数据的一排的多个帧的帧发生器，傅里叶变换单元，配置为变换的所述至少一个 生成的帧划分为通过傅里叶变换，加法单元，配置为规定的频率特性添加到变换的帧，以及逆傅立叶变换单元被配置为通过逆傅立叶变换，以所添加的帧变换成时域和删除重叠的频域 的时域帧的变换。

公开(公告)号：EP1312164B1

公开(公告)日：2008-05-28

申请号：EP00959110.8

申请日：2000-08-25

申请人： STMicroelectronics Asia Pacific Pte Ltd

发明人： TIAN, Wenshun

IPC分类号： H03H17/02 ,  H03H17/06

CPC分类号： H03H17/0219 ,  H03H17/0213 ,  H03H17/06

摘要： A method for long impulse response digital filtering of an input data stream, by use of a digital filtering system. Where the input data stream is divided into zero-input signals and zero-state signals. One of the zero-input signals and a corresponding impulse response of the digital filtering system is converted to the frequency domain to determine a respective zero-input response of the digital filtering system. One of the zero-state signals is convolved with a corresponding impulse response of the digital filtering system to determine a respective zero-state response of the digital filtering system, wherein at least part of the zero-input signal precedes the zero-state signal. The zero-state response of the digital filtering system is added to the zero-input response of the digital filtering system to determine the response of the digital filtering system. Apparatus for effecting this method is also disclosed.

公开(公告)号：EP1121754B1

公开(公告)日：2007-07-04

申请号：EP99970801.9

申请日：1999-09-24

申请人： TELEFONAKTIEBOLAGET LM ERICSSON (publ)

发明人： HELLBERG, Richard

IPC分类号： H03H17/02

CPC分类号： H03H17/0213

摘要： The present invention relates generally to the problem of filtering, decimation or interpolation and frequency conversion in the digital domain, and more particularly to the use of the stand-alone or improved modified fast convolution algorithm in wideband multichannel receiver, channelization, and transmitter, de-channelization structures of a radio communication system. The invention consists of essentially 3 steps: making sure that we use different overlaps on consecutive blocks that, on average, give the same overlap on both the input and output ends; aligning the signal in consecutive blocks of time; and compensating for phase shifts due to frequency shifting. The essence of the invention is that it decouples the input and output transform lengths in the fast convolution algorithm from each other and from the overlap, making it possible to use any transform length on the input together with any transform length on the output and at the same time use any overlap. This provides an enormous amount of freedom compared with the limitations of state of the art.

公开(公告)号：EP1198882A1

公开(公告)日：2002-04-24

申请号：EP00946729.1

申请日：2000-07-07

申请人： Telefonaktiebolaget L M Ericsson (Publ)

发明人： HELLBERG, Richard ,  LEYONHJELM, Scott ,  ERIKSSON, Joakim

IPC分类号： H03H17/02

CPC分类号： H03H17/0213 ,  H03H17/0266

摘要： In a wireless telecommunications system, data processing delays associated with digital channelization and de-channelization may be reduced through the use of a technique that involves processing data blocks in conjunction with the transformation of the data blocks by a large, Fast Fourier Transform (FFT) algorithm, and makes use of multiple transmission and reception branches. In accordance with this technique, the processing delays associated with the FFT algorithm are minimized, but not to the detriment of other important channelizer/de-channelizer design characteristics, such as power consumption, die area and computational complexity.

公开(公告)号：EP0649578A1

公开(公告)日：1995-04-26

申请号：EP93914555.0

申请日：1993-07-05

申请人： LAKE DSP PTY. LIMITED

发明人： McGRATH, David, Stanley

IPC分类号： G06F17 ,  H03H17

CPC分类号： H03H17/06 ,  G06F17/142 ,  H03H17/0213

摘要： Apparatus for and methods of operation of digital filters and certain other electronic digital signal processing devices are provided to improve the accuracy and efficiency of filtering. Particularly, the apparatus and method includes a digital filter with a long impulse response and lower latency, built by operating a numbr of small component filters (F1, F2, F3) in parallel and combining their outputs by addition, with each component filter operating with a different delay such that the net operation of the ensemble of said component filters is the same as a single filter with a longer impulse response, and the latency of the ensemble is equal to the shortest latency of the component filters. At least one group of the component filters is implemented using a Discrete Fourier Transform technique. A Fourier transform processor adapted to efficiently transform strings of real data is also described.

公开(公告)号：EP3258598A1

公开(公告)日：2017-12-20

申请号：EP17757454.8

申请日：2017-01-16

申请人： NTT Electronics Corporation ,  Nippon Telegraph and Telephone Corporation

发明人： ONUMA, Yasuharu ,  YAMAZAKI, Etsushi ,  TAKEI, Kazuhito ,  ISHIDA, Osamu ,  HORIKOSHI, Kengo ,  YOSHIDA, Mitsuteru ,  KISAKA, Yoshiaki ,  TOMIZAWA, Masahito

IPC分类号： H03H17/00 ,  H03H17/06

CPC分类号： H03H17/0227 ,  H03H17/00 ,  H03H17/0213 ,  H03H17/06 ,  H03H2017/0214 ,  H03H2017/0245 ,  H03H2017/0298 ,  H04L7/0029 ,  H04L7/0087

摘要： A parallel transfer rate converter (4) inputs first parallel data with number of samples being S1 pieces in synchronism with a first clock, and outputs second parallel data with number of samples being S2=S1×(m/p) pieces (p is an integer equal to or larger than 1) in synchronism with a second clock having a frequency which is p/m times of a frequency of the first clock. A convolution operation device (5) inputs the second parallel data in synchronism with the second clock, generates third parallel data with number of samples being S3=S2×(n/m) pieces (S3 is an integer equal to or larger than 1) by executing a convolution operation with a coefficient indicating a transmission characteristic to the second parallel data, and outputs the third parallel data in synchronism with the second clock.

摘要翻译： 并行传送速率转换器（4）输入与第一时钟同步的具有S1个样本数的第一并行数据，并输出样本数为S2 = S1×（m / p）个片（p是 整数等于或大于1）与频率为第一时钟的频率的p / m倍的第二时钟同步。 卷积运算装置（5）与第2时钟同步地输入第2并行数据，生成样本数为S3 = S2×（n / m）个（S3为1以上的整数）的第3并行数据， 通过使用指示对第二并行数据的传输特性的系数执行卷积运算，并且与第二时钟同步地输出第三并行数据。

公开(公告)号：EP1879293A3

公开(公告)日：2017-05-31

申请号：EP07011621.5

申请日：2007-06-13

申请人： Harman Becker Automotive Systems GmbH

发明人： Christoph, Markus

IPC分类号： H03H17/02 ,  H04L25/03 ,  H04S1/00

CPC分类号： H04S1/007 ,  H03H17/0213 ,  H04L25/03159 ,  H04L2025/03522

摘要： The present invention relates to a method for processing a digital input signal by a Finite Impulse Response, FIR, filtering means, comprising partitioning the digital input signal at least partly in the time domain to obtain at least two partitions of the digital input signal; partitioning the FIR filtering means in the time domain to obtain at least two partitions of the FIR filtering means; Fourier transforming each of the at least two partitions of the digital input signal to obtain Fourier transformed signal partitions; Fourier transforming each of the at least two partitions of the FIR filtering means to obtain Fourier transformed filter partitions; performing a convolution of the Fourier transformed signal partitions and the corresponding Fourier transformed filter partitions to obtain spectral partitions; combining the spectral partitions to obtain a total spectrum; and inverse Fourier transforming the total spectrum to obtain a digital output signal.

摘要翻译： 本发明涉及一种用于通过有限脉冲响应FIR滤波装置处理数字输入信号的方法，该方法包括至少部分地在时域中对数字输入信号进行分割以获得数字输入信号的至少两个分区; 在时域中分割FIR滤波装置以获得FIR滤波装置的至少两个分区; 对所述数字输入信号的所述至少两个分区中的每一个进行傅里叶变换以获得傅里叶变换的信号分区; 对所述FIR滤波装置的所述至少两个分区中的每一个进行傅立叶变换以获得傅立叶变换的滤波器分区; 执行傅立叶变换的信号分区和对应的傅立叶变换的滤波器分区的卷积以获得频谱分区; 组合谱分区以获得总谱; 并对总谱进行傅立叶逆变换以获得数字输出信号。