ADAPTIVE FILTER SYSTEM HAVING MIXED FIXED POINT OR FLOATING POINT AND BLOCK SCALE FLOATING POINT OPERATORS
    3.
    发明公开
    ADAPTIVE FILTER SYSTEM HAVING MIXED FIXED POINT OR FLOATING POINT AND BLOCK SCALE FLOATING POINT OPERATORS 失效
    与混合不动逗号或浮子和区块缩放算自适应滤波器系统

    公开(公告)号:EP0998787A1

    公开(公告)日:2000-05-10

    申请号:EP98933120.2

    申请日:1998-07-02

    申请人: Cirrus Logic, Inc

    IPC分类号: H03H21/00 H03H17/02

    摘要: An adaptive filter is provided which has fixed point or floating point data stored in a data RAM (74) and block scale floating point coefficients stored in a coefficient RAM (84). The data and coefficients are utilized in a filter algorithm which utilizes a multiplier and an accumulator to provide a convolution result. Coefficients are uptdated by adding the multiplied result of the data RAM value and the error value to the old value of the coefficient. This is done for all the coefficient values in the coefficient RAM. The error value indicates the difference between the filter output and the sample near-end signal that is the echo. These new coefficients are examined and if any have a value above or all have a value below a predetermined threshold, then the mantissas of all the coefficents are shifted and the exponent adjusted in the next filter cycle.

    Digital filter and reference signal cancelling device using the same
    4.
    发明公开
    Digital filter and reference signal cancelling device using the same 有权
    数字Fiter及含有该装置的参考信号的抑制

    公开(公告)号:EP1148640A2

    公开(公告)日:2001-10-24

    申请号:EP01108195.7

    申请日:2001-03-30

    IPC分类号: H03H17/04

    CPC分类号: H03H17/04 H03H17/0227

    摘要: A second-order bandpass IIR type digital filter, assuming that a sampling frequency is six times as large as a central frequency of a passing frequency band, a first-order input feedback coefficient b1 is set at -1 + 2 -n and a second-order input feedback coefficient b2 is set at 1 - 2- (n-1) (n: an odd number of 3 or larger). In this configuration, second-order IIP type digital filter with a simple arrangement and high accuracy can be provided. In a reference signal canceling apparatus, using such a digital filter, the reference signal can be canceled effectively and completely.

    DECIMATION FILTER AS FOR A SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER
    6.
    发明公开
    DECIMATION FILTER AS FOR A SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER 失效
    用于抽取Σ-Δ模数转换器。

    公开(公告)号:EP0472600A1

    公开(公告)日:1992-03-04

    申请号:EP90907875.0

    申请日:1990-05-08

    IPC分类号: H03H17

    摘要: On utilise comme filtre decimeur pour un convertisseur analogique/numérique un filtre à réponse finie à une impulsion, à taux multiples et à étage unique. Le filtre utilise 2048 valeurs de coefficient à 22 bits afin de produire un signal échantillonné de sortie de données ayant un taux d'échantillonnage de 48 KHz et une résolution d'échantillonnage de 16 bits à partir d'un signal d'entrée ayant un taux d'échantillonnage de 3,072 MHz et une résolution d'échantillonage d'un bit. Le filtre utilise une seule mémoire morte (820) pour retenir les 2048 valeurs de coefficient. Les valeurs de coefficient sont distribuées parmi huit accumulateurs multiplexés à quatre voies par un circuit qui comprend un multiplexeur de signaux (822) et un décaleur à tambour (824). Les accumulateurs utilisent une arithmétique sans signe pour calculer les valeur d'échantillonnage de sortie. Une valeur CO, qui représente un décalage de normalisation (812) et un gain appliqué à chaque valeur de coefficient, est sélectionnée de sorte que 2048 fois CO soit une valeur qui dépasse la capacité de l'accumulateur, laissant une valeeur égale à zéro dans l'accumulateur.

    SIGNAL GENERATING DEVICE
    8.
    发明公开
    SIGNAL GENERATING DEVICE 审中-公开
    信号发生装置

    公开(公告)号:EP2884660A1

    公开(公告)日:2015-06-17

    申请号:EP13879391.4

    申请日:2013-07-31

    IPC分类号: H03H17/00

    摘要: To provide a signal generating device that can generate an interpolated signal without increasing a memory capacity, at a time of obtaining an interpolated value close to a true value. The signal generating device includes a digital filter unit 1 outputting a first interpolated signal by interpolating an input signal, a digital filter unit 2 outputting a second interpolated signal by interpolating the first interpolated signal, a phase calculation unit 3 calculating a phase of a digital signal, a phase-accuracy conversion unit 4 calculating first phase signal and second phase signal, a memory 5 storing filter coefficients, a coefficient readout unit 6 reading filter coefficients from the memory 5 and switching filter coefficients of the digital filter unit 1, a phase-error calculation unit 7 calculating a phase error signal, a memory 8 storing filter coefficients, a coefficient readout unit 9 reading filter coefficients from the memory 8, and a gain normalization unit 10 normalizing a gain of the filter coefficients to maintain a constant sum of the filter coefficients and switching filter coefficients of the digital filter unit 2.

    摘要翻译: 为了提供一种信号产生装置,该信号产生装置能够在不增加存储器容量的情况下产生内插信号,而在获得接近真值的内插值时。 信号发生装置包括:数字滤波器单元1,其通过内插输入信号来输出第一内插信号;数字滤波器单元2,其通过内插第一内插信号来输出第二内插信号;相位计算单元3,其计算数字信号的相位 ,计算第一相位信号和第二相位信号的相位精度转换单元4,存储滤波器系数的存储器5,从存储器5读取滤波器系数和切换数字滤波器单元1的滤波器系数的系数读出单元6, 计算相位误差信号的误差计算单元7,存储滤波器系数的存储器8,从存储器8读取滤波器系数的系数读出单元9,以及对滤波器系数的增益进行归一化的增益归一化单元10,以保持 数字滤波器单元2的滤波器系数和切换滤波器系数。

    DIGITAL FILTER
    9.
    发明公开
    DIGITAL FILTER 有权
    数字滤波器

    公开(公告)号:EP1913692A2

    公开(公告)日:2008-04-23

    申请号:EP06780213.2

    申请日:2006-07-26

    申请人: NXP B.V.

    IPC分类号: H03H17/02

    CPC分类号: H03H17/0227 H03H17/0225

    摘要: A FIR filter (20) has a delay line comprising four delay elements (21a, 21 b, 21c, 21 d) for delaying a signal received at a filter input (22) and four multipliers (24a, 24b, 24c, 24d) for multiplying the delayed signals by respective partial filter coefficients a, b, c, d. The delay elements (21a, 21 b, 21c, 21 d) and multipliers (24a, 24b, 24c, 24d) are connected alternately in series. Four taps (23a, 23b, 23c, 23d) extract the signal from the delay line immediately after each of the delay elements (21a, 21 b, 21c, 21 d) and output the delayed, multiplied signals to an adder (25) for adding the delayed, multiplied signals to generate a filter output (26). The partial filter coefficients a, b, c, d effectively combine to implement filter coefficients A, B, C, D for the taps (23a, 23b, 23c, 23d), e.g. with A = a, B = a*b, C = a*b*c and D = a*b*c*d. Use of such partial filter coefficients a, b, c, d can significantly reduce the number of operations required for multiplication in the FIR filter (20) in comparison to the prior art.

    Digital filter and reference signal cancelling device using the same
    10.
    发明公开
    Digital filter and reference signal cancelling device using the same 有权
    数字Fiter及含有该装置的参考信号的抑制

    公开(公告)号:EP1148640A3

    公开(公告)日:2004-04-21

    申请号:EP01108195.7

    申请日:2001-03-30

    IPC分类号: H03H17/04

    CPC分类号: H03H17/04 H03H17/0227

    摘要: A second-order bandpass IIR type digital filter, assuming that a sampling frequency is six times as large as a central frequency of a passing frequency band, a first-order input feedback coefficient b1 is set at -1 + 2 -n and a second-order input feedback coefficient b2 is set at 1 - 2- (n-1) (n: an odd number of 3 or larger). In this configuration, second-order IIP type digital filter with a simple arrangement and high accuracy can be provided. In a reference signal canceling apparatus, using such a digital filter, the reference signal can be canceled effectively and completely.