公开(公告)号：EP2665187A1

公开(公告)日：2013-11-20

申请号：EP12167901.3

申请日：2012-05-14

申请人： NXP B.V.

发明人： De Boet, Johannes Adrianus Maria

IPC分类号： H03K17/0814

CPC分类号： H01L29/7818 ,  H03G11/02 ,  H03K17/08142

摘要： The invention relates to an electronic device comprising an RF-LDMOS transistor (1) and a protection circuit (2) for the RF-LDMOS transistor. The protection circuit (2) comprises: i) an input terminal (Ni) coupled to a drain terminal (Drn) of the RF-LDMOS transistor (1); ii) a clipping node (Nc); iii) a clipping circuit (3) coupled to the clipping node (Nc) for substantially keeping the voltage on the clipping node (Nc) below a predefined reference voltage, wherein the predefined reference voltage is designed to be larger than the operation voltage on the drain terminal (Drn) and lower than a trigger voltage of a parasitic bipolar transistor that is inherently present in the RF-LDMOS transistor; iv) a capacitance (Ct) coupled between the clipping node (Nc) and a further reference voltage terminal (Gnd), and v) a rectifying element (D1, D2) connected with its anode terminal to the input terminal (Ni) and with its cathode terminal to the clipping node (Nc). The invention provides an RF-LDMOS transistor having an improved RF ruggedness, while not, or at least to a much lesser extent, compromising the RF performance of the RF-LDMOS transistor.

摘要翻译： 本发明涉及一种包括用于RF-LDMOS晶体管的RF-LDMOS晶体管（1）和保护电路（2）的电子器件。 保护电路（2）包括：i）耦合到RF-LDMOS晶体管（1）的漏极端子（Drn）的输入端子（Ni）; ii）剪切节点（Nc）; iii）耦合到限幅节点（Nc）的削波电路（3），用于将剪切节点（Nc）上的电压基本上保持在预定的参考电压以下，其中预定的参考电压被设计为大于在 漏极端子（Drn）并且低于RF-LDMOS晶体管中固有存在的寄生双极晶体管的触发电压; iv）耦合在限幅节点（Nc）和另一个参考电压端子（Gnd）之间的电容（Ct），以及v）与其阳极端子连接到输入端子（Ni）的整流元件（D1，D2） 其阴极端子到剪切节点（Nc）。 本发明提供了具有改进的RF耐久性的RF-LDMOS晶体管，而不是或至少在较小程度上损害了RF-LDMOS晶体管的RF性能。

公开(公告)号：EP2515334A1

公开(公告)日：2012-10-24

申请号：EP11163258.4

申请日：2011-04-20

申请人： NXP B.V.

发明人： De Boet, Johannes Adrianus Maria

IPC分类号： H01L27/02 ,  H03K19/003 ,  H02H9/04

CPC分类号： H02H9/044 ,  H01L27/0259 ,  H03K19/00315

摘要： Disclosed is a circuit (100) comprising a transistor (110) coupled between a supply voltage line (102) and ground (106), the transistor comprising a control terminal coupled to a input signal line (104), the circuit further comprising first and second bipolar transistors (122, 124) coupled in series between the input signal line (104) and ground (106), wherein the base of the first bipolar transistor is connected to the input signal line and the base of the second bipolar transistor is connected to ground.

摘要翻译： 公开了一种包括耦合在电源电压线（102）和地（106）之间的晶体管（110）的电路（100），所述晶体管包括耦合到输入信号线（104）的控制端，所述电路进一步包括第一和 在输入信号线（104）和地（106）之间串联耦合的第二双极晶体管（122,124），其中第一双极晶体管的基极连接到输入信号线并且第二双极晶体管的基极连接 到地面。

公开(公告)号：EP2879185A1

公开(公告)日：2015-06-03

申请号：EP13195174.1

申请日：2013-11-29

申请人： NXP B.V.

发明人： De Boet, Johannes Adrianus Maria

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66659 ,  H01L29/0878 ,  H01L29/1045 ,  H01L29/404 ,  H01L29/7835

摘要： In this document there is described a Radio Frequency power transistor device (200b, 400b) which comprises (a) a substrate (110), (b) a source contact region (120) formed over the substrate (110), (c) a gate contact region formed (140) over the substrate (110), (d) a drain contact region (130) formed over the substrate (110), (e) a parasitic bipolar transistor (160) given between the substrate (110) and the gate contact region (140), (f) an elongated drain extension region (134) being connected to the drain contact region (130) and extending at least partially towards the parasitic bipolar transistor (160), and (g) an elongated resistor region (270, 470) being arranged between the source contact region (120) and the drain contact region (130). The elongated resistor region (270, 470) extends partially between the source contact region (120) and the drain contact region (130). It is further described a method for forming such a power transistor device (200b, 400b).

摘要翻译： 在该文献中描述了一种射频功率晶体管器件（200B，400B），其包括（a）基材（110），（b）一种形成在基片（110）源极接触区（120），（c）一种 形成的栅极接触区域（140）的衬底（110）上，（d）中，形成在所述基板（110）的漏极接触区（130），所述基板（110）之间的给定的（e）中的寄生双极晶体管（160）和 栅极接触区域（140），（f）至细长漏极延伸区（134）被连接到所述漏极接触区（130）和至少部分地延伸向所述寄生双极晶体管（160）和长形电阻器（g）的 区域（270，470）设置在源极接触区域（120）和所述漏极接触区（130）之间布置。 细长电阻区域（270，470）的源极接触区（120）和所述漏极接触区（130）之间部分地延伸。 它是用于形成进一步描述寻求功率晶体管器件（200B，400B）的方法。

公开(公告)号：EP2515334B1

公开(公告)日：2013-11-20

申请号：EP11163258.4

申请日：2011-04-20

申请人： NXP B.V.

发明人： De Boet, Johannes Adrianus Maria

IPC分类号： H01L27/02 ,  H03K19/003 ,  H02H9/04

CPC分类号： H02H9/044 ,  H01L27/0259 ,  H03K19/00315

摘要： Disclosed is a circuit (100) comprising a transistor (110) coupled between a supply voltage line (102) and ground (106), the transistor comprising a control terminal coupled to a input signal line (104), the circuit further comprising first and second bipolar transistors (122, 124) coupled in series between the input signal line (104) and ground (106), wherein the base of the first bipolar transistor is connected to the input signal line and the base of the second bipolar transistor is connected to ground.