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    ELECTRONIC CIRCUIT PROVIDED WITH A DIGITAL DRIVER FOR DRIVING A CAPACITIVE LOAD
    1.
    发明授权
    ELECTRONIC CIRCUIT PROVIDED WITH A DIGITAL DRIVER FOR DRIVING A CAPACITIVE LOAD 有权
    具有数字驱动器，用于驱动容性负载电子电路

    公开(公告)号：EP1183780B1

    公开(公告)日：2010-10-20

    申请号：EP01917058.8

    申请日：2001-03-05

    申请人： NXP B.V.

    发明人： BOEZEN, Hendrik ,  VAN DEN HEUVEL, Abraham, K.

    IPC分类号： H03K19/003 ,  H03K19/00 ,  H03K5/151

    CPC分类号： H03K5/1515

    摘要： An electronic circuit having first (VSS) and second (VDD) power supply terminals and comprising a first digital driver (DRV) and a further digital driver (DRVF). The digital drivers (DRV, DRVF) are arranged for driving capacitive loads such as charge pump capacitors (CP1, CP2) of a charge pump (CHGP). The first digital driver (DRV) comprises a first field effect transistor (T1) having a source coupled to the first power supply terminal (VSS), a drain coupled for driving the first charge pump capacitor (CP1), and a gate; a second field effect transistor (T2) having a source coupled to the second power supply terminal (VDD), a drain coupled to the drain of the first field effect transistor (T1), and a gate; a first capacitor (C1) coupled between the gate of the first field effect transistor (T1) and an input terminal (CLK) for receiving a digital input signal (UCLK); and a second capacitor (C2) coupled between the gate of the second field effect transistor (T2) and the input terminal (CLK). The further digital driver (DRVF) is constructed in a similar way as the digital driver (DRV). DC paths are formed between the gates of field effect transistors (T1 - T4) and the supply terminals (VSS, VDD). Owing to the special construction of the digital drivers (DRV, DRVF), there is never a short-circuit current between the digital drivers (DRV, DRVF). As a result, the digital drivers (DRV, DRVF) have a very high power efficiency.

    CIRCUIT FOR SUPPRESSING A COMMON MODE COMPONENT IN A SIGNAL FROM A CAN COMMUNICATION BUS
    2.
    发明授权
    CIRCUIT FOR SUPPRESSING A COMMON MODE COMPONENT IN A SIGNAL FROM A CAN COMMUNICATION BUS 有权
    电路对GLEICHTAKTKOMPONENT的在CAN-BUS通信信号降低

    公开(公告)号：EP1092300B1

    公开(公告)日：2008-11-12

    申请号：EP00926990.3

    申请日：2000-04-17

    申请人： NXP B.V.

    发明人： BOEZEN, Hendrik ,  VAN DEN HEUVEL, Abraham, K.

    IPC分类号： H04L12/40 ,  H04L12/413 ,  H03F3/45

    CPC分类号： H03F3/45704 ,  H04L12/4135 ,  H04L2012/40215

    摘要： The common mode component in the difference signal on the bus terminals (2, 4) of a CAN bus is counteracted by four transistors (M1-M4) connected between the supply terminals (28, 32) and a center tap (16) of a voltage divider (6A, 6B, 8, 10, 12A, 12B) between the bus terminals (2, 4). As a result of this, the voltage on the center tap (16) varies to a substantially smaller extent or not at all. Thus, it is possible to use a simpler differential amplifier (20) having a smaller common mode swing at the inputs (22, 24). Moreover, the attenuation factor selected for the voltage divider can be smaller, as a result of which a higher difference voltage is available for the differential amplifier (20).