公开(公告)号：EP4203064A1

公开(公告)日：2023-06-28

申请号：EP22215156.5

申请日：2022-12-20

申请人： NXP USA, Inc.

发明人： Grote, Bernhard ,  Kabir, Humayun ,  Green, Bruce McRae ,  Khalil, Ibrahim

IPC分类号： H01L29/423 ,  H01L29/778 ,  H01L21/338 ,  H01L29/40 ,  H01L29/08 ,  H01L29/20

摘要： A semiconductor device includes a semiconductor substrate (110), a first dielectric layer (130) disposed over the upper surface of the semiconductor substrate, a second dielectric layer (150) disposed over the first dielectric layer, a third dielectric layer (155) disposed over the second dielectric layer, a lower opening (136) formed in the first dielectric layer, an upper opening (158) formed in the second dielectric layer and the third dielectric layer, wherein at least a portion of the upper opening overlaps a portion of the lower opening, and a control electrode (160) formed within at least a portion of the lower opening and within a portion of the upper opening, wherein a portion of the control electrode is formed over the third dielectric layer.

公开(公告)号：EP3961699A3

公开(公告)日：2022-08-24

申请号：EP21188854.0

申请日：2021-07-30

申请人： NXP USA, Inc.

发明人： Khalil, Ibrahim ,  Lessard, Charles John ,  Jones, Jeffrey Kevin

IPC分类号： H01L23/482 ,  H01L23/36 ,  H01L23/66 ,  H01L23/433 ,  H01L23/488 ,  H01L23/48

摘要： Radio frequency (RF) power dies having flip-chip architectures are disclosed, as are power amplifier modules (PAMs) containing such RF power dies. Embodiment of the PAM include a module substrate and an RF power die, which is mounted to a surface of the module substrate in an inverted orientation. The RF power die includes, in turn, a die body having a frontside and an opposing backside, a transistor having active regions formed in the die body, and a frontside layer system formed over the die body frontside. The frontside layer system contains patterned metal layers defining first, second, and third branched electrode structures, which are electrically coupled to the active regions of the transistor. A frontside input/output interface is formed in an outer terminal portion of the frontside layer system and contains first, second, and third bond pads electrically coupled to the first, second, and third branched electrode structures, respectively.

公开(公告)号：EP4443496A2

公开(公告)日：2024-10-09

申请号：EP24167577.6

申请日：2024-03-28

申请人： NXP USA, Inc.

发明人： Kabir, Humayun ,  Khalil, Ibrahim

IPC分类号： H01L23/482

CPC分类号： H01L23/4824 ,  H01L23/66 ,  H01L29/41758 ,  H01L29/41766

摘要： A transistor includes a semiconductor die with an active region and one or more non-active regions that do not overlap or overlie the active region. The transistor further includes a group of multiple transistor fingers in the active region. One or more source vias are located adjacent to sides of the group of transistor fingers. One or more source manifolds are located in the non-active region(s), and the source manifold(s) electrically connect the source via(s) with at least one source region of the multiple transistor fingers.

公开(公告)号：EP4024447A1

公开(公告)日：2022-07-06

申请号：EP21209597.0

申请日：2021-11-22

申请人： NXP USA, Inc.

发明人： Jones, Jeffrey Kevin ,  Kim, Kevin ,  van Straten, Freek Egbert ,  Khalil, Ibrahim

IPC分类号： H01L23/36 ,  H03F3/189

摘要： An amplifier module includes a module substrate with a mounting surface, a signal conducting layer, a ground layer, and a ground terminal pad at the mounting surface. A thermal dissipation structure extends through the module substrate. A ground contact of a power transistor die is coupled to a surface of the thermal dissipation structure. Encapsulant material covers the mounting surface of the module substrate and the power transistor die, and a surface of the encapsulant material defines a contact surface of the amplifier module. A ground terminal is embedded within the encapsulant material. The ground terminal has a proximal end coupled to the ground terminal pad, and a distal end exposed at the contact surface. The ground terminal is electrically coupled to the ground contact of the power transistor die through the ground terminal pad, the ground layer of the module substrate, and the thermal dissipation structure.

公开(公告)号：EP4213217A3

公开(公告)日：2023-11-29

申请号：EP22215147.4

申请日：2022-12-20

申请人： NXP USA, Inc.

发明人： Green, Bruce, McRae ,  Khalil, Ibrahim ,  Grote, Bernhard

IPC分类号： H01L29/778 ,  H01L21/338 ,  H01L29/41 ,  H01L29/08 ,  H01L29/423 ,  H01L29/20

摘要： A semiconductor device includes a semiconductor substrate (110), a first dielectric layer (130), a first current-carrying electrode (140), and a second current-carrying electrode (145) formed over the semiconductor substrate. A control electrode (150) is formed over the semiconductor substrate and disposed between the first current-carrying electrode and the second current-carrying electrode. A conductive element (180) formed over the first dielectric layer, adjacent the control electrode, and between the control electrode and the second current-carrying electrode, includes a first region (182) formed a first distance (183) from the upper surface of the semiconductor substrate and a second region (186) formed a second distance (187) from the upper surface of the semiconductor substrate. An insulating region (160) is formed between the control electrode and the conductive element.

公开(公告)号：EP4213217A2

公开(公告)日：2023-07-19

申请号：EP22215147.4

申请日：2022-12-20

申请人： NXP USA, Inc.

发明人： Green, Bruce, McRae ,  Khalil, Ibrahim ,  Grote, Bernhard

IPC分类号： H01L29/778 ,  H01L21/338 ,  H01L29/41 ,  H01L29/08 ,  H01L29/423 ,  H01L29/20

摘要： A semiconductor device includes a semiconductor substrate (110), a first dielectric layer (130), a first current-carrying electrode (140), and a second current-carrying electrode (145) formed over the semiconductor substrate. A control electrode (150) is formed over the semiconductor substrate and disposed between the first current-carrying electrode and the second current-carrying electrode. A conductive element (180) formed over the first dielectric layer, adjacent the control electrode, and between the control electrode and the second current-carrying electrode, includes a first region (182) formed a first distance (183) from the upper surface of the semiconductor substrate and a second region (186) formed a second distance (187) from the upper surface of the semiconductor substrate. An insulating region (160) is formed between the control electrode and the conductive element.

公开(公告)号：EP4016612A2

公开(公告)日：2022-06-22

申请号：EP21208835.5

申请日：2021-11-17

申请人： NXP USA, Inc.

发明人： Kabir, Humayun ,  Khalil, Ibrahim

IPC分类号： H01L23/482

摘要： A semiconductor device includes a semiconductor substrate, a first current-carrying electrode, a second current-carrying electrode, a first control electrode disposed between the first current-carrying electrode and the second current-carrying electrode, a third current-carrying electrode electrically coupled to the first current-carrying electrode, and a fourth current-carrying electrode adjacent the third current-carrying electrode. The third current-carrying electrode and the fourth current-carrying electrode are configured to support current flow from the third current-carrying electrode to the fourth current-carrying electrode parallel to a second direction. The fourth current-carrying element is electrically coupled to the second current-carrying electrode and a second control electrode. The second control electrode is electrically coupled to the first control electrode. A first crossing region is electrically coupled to the first control electrode and a second crossing region is electrically coupled to the fourth current-carrying electrode, wherein the second crossing region crosses a portion of the first crossing region.

公开(公告)号：EP4092755A3

公开(公告)日：2023-04-05

申请号：EP22174036.8

申请日：2022-05-18

申请人： NXP USA, Inc.

发明人： Grote, Bernhard ,  Kabir, Humayun ,  Khalil, Ibrahim ,  Green, Bruce McRae

IPC分类号： H01L29/778 ,  H01L21/338 ,  H01L29/41 ,  H01L29/08 ,  H01L29/20

摘要： An embodiment of a semiconductor device includes a semiconductor substrate (110), a first current-carrying electrode (140), and a second current-carrying electrode (145) formed over the semiconductor, a control electrode (150) formed over the semiconductor substrate between the first current carrying electrode and the second current carrying electrode, and a first dielectric layer (160) disposed over the control electrode, and a second dielectric layer (170) disposed over the first dielectric layer. A first opening is formed in the second dielectric layer, adjacent the control electrode and the second current-carrying electrode, having a first edge laterally adjacent to and nearer the second current-carrying electrode, and a second edge laterally adjacent to and nearer to the control electrode, and a conductive element (180) formed over the first dielectric layer and within the first opening, wherein the portion of the conductive element formed within the first opening forms a first metal-insulator-semiconductor region (187) within the first opening.

公开(公告)号：EP3993026A3

公开(公告)日：2022-09-21

申请号：EP21201045.8

申请日：2021-10-05

申请人： NXP USA, Inc.

发明人： Shilimkar, Vikas ,  Srinidhi Embar, Ramanujam ,  Khalil, Ibrahim

IPC分类号： H01L23/482 ,  H01L23/528 ,  H01L23/00 ,  H01L23/522 ,  H01L23/66

摘要： A semiconductor device includes a die body having a frontside and a transistor having an active area formed in the die body, the active area being bounded by an outer periphery.
An interconnect structure is formed over the frontside of the die body and contains patterned electrically conductive material defining first, second, and third contacts electrically coupled to first, second, and third subregions, respectively, within the active area of the transistor. A frontside input/output (I/O) interface is formed in an outer portion of the interconnect structure. The frontside I/O interface contains first, second, and third contact pads, the first contact pad being electrically connected to the first contact, the second contact pad being electrically connected to the second contact, and the third contact pad being electrically connected the third contact, wherein the third contact pad is positioned at a location overlying the active area of the transistor.

公开(公告)号：EP4016612A3

公开(公告)日：2022-07-06

申请号：EP21208835.5

申请日：2021-11-17

申请人： NXP USA, Inc.

发明人： Kabir, Humayun ,  Khalil, Ibrahim

IPC分类号： H01L23/482 ,  H01L29/40

摘要： A semiconductor device includes a semiconductor substrate, a first current-carrying electrode, a second current-carrying electrode, a first control electrode disposed between the first current-carrying electrode and the second current-carrying electrode, a third current-carrying electrode electrically coupled to the first current-carrying electrode, and a fourth current-carrying electrode adjacent the third current-carrying electrode. The third current-carrying electrode and the fourth current-carrying electrode are configured to support current flow from the third current-carrying electrode to the fourth current-carrying electrode parallel to a second direction. The fourth current-carrying element is electrically coupled to the second current-carrying electrode and a second control electrode. The second control electrode is electrically coupled to the first control electrode. A first crossing region is electrically coupled to the first control electrode and a second crossing region is electrically coupled to the fourth current-carrying electrode, wherein the second crossing region crosses a portion of the first crossing region.