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    COMMUNICATION CHIP, COMMUNICATION MODULE, COMMUNICATION SYSTEM AND BASE STATION
    5.
    发明公开
    COMMUNICATION CHIP, COMMUNICATION MODULE, COMMUNICATION SYSTEM AND BASE STATION 审中-实审

    公开(公告)号：EP4418542A1

    公开(公告)日：2024-08-21

    申请号：EP21961982.2

    申请日：2021-10-30

    Applicant: Huawei Technologies Co., Ltd.

    Inventor： DING, Wenqi ,  ZHOU, Qian ,  TANG, Haizheng ,  CUI, Changyun ,  LIANG, Le ,  ZHENG, Wenquan ,  ZHOU, Xiaomin

    IPC: H04B1/04 ,  H04B7/06 ,  H01L23/66

    CPC classification number: H04B7/06 ,  H04B1/04 ,  H01L23/66

    Abstract: Embodiments of this application disclose a communication chip, a communication module, a communication system, and a base station. The communication chip specifically includes a frequency mixer, a power division module, and a switch module. The frequency mixer is connected to a first interface, and the frequency mixer is configured to perform frequency conversion on a first input signal received by the first interface or a first output signal that needs to be sent by the first interface. The power division module is connected to a second interface, and the power division module is configured to perform combination on a second input signal received by the second interface or perform power division on a second output signal that needs to be sent by the second interface. The switch module is connected to a third interface. The third interface is configured to receive a third input signal or send a third output signal. The switch module is configured to control the second interface to form a closed circuit with the third interface through the power division module, or to form a closed circuit with the first interface through the power division module and the frequency mixer, so that the communication chip can be used as a driver chip or a frequency mixer chip in series at the same time, thereby reducing a loss of a power divider at low costs.

    DOHERTY AMPLIFIER
    9.
    发明公开
    DOHERTY AMPLIFIER 审中-公开

    公开(公告)号：EP4391044A1

    公开(公告)日：2024-06-26

    申请号：EP23214905.4

    申请日：2023-12-07

    Applicant: Sumitomo Electric Device Innovations, Inc.

    Inventor： Wong, James ,  Kawasaki, Kento

    IPC: H01L23/482 ,  H01L23/66 ,  H03F1/02 ,  H01L27/02 ,  H01L29/20 ,  H01L29/417 ,  H01L29/778

    CPC classification number: H03F1/0288 ,  H01L23/4824 ,  H01L23/66 ,  H01L2223/664420130101 ,  H01L2223/665520130101 ,  H01L27/0207 ,  H01L29/41758 ,  H01L29/2003 ,  H01L29/7786

    Abstract: A Doherty amplifier according to the present disclosure includes a substrate, a first transistor provided on the substrate, the first transistor including a plurality of first gate electrodes extending in a first direction, a plurality of first drain electrodes extending in the first direction, a first gate bus bar to which a first signal of two signals obtained by dividing an input signal is input and to which the plurality of first gate electrodes are electrically connected, and a first drain bus bar provided so as to dispose the plurality of first gate electrodes and the plurality of first drain electrodes between the first gate bus bar and the first drain bus bar, the plurality of first drain electrodes being electrically connected to the first drain bus bar, a second transistor provided on the substrate, the transistor including a plurality of second gate electrodes extending in a second direction, a plurality of second drain electrodes extending in the second direction, a second gate bus bar having a first end to which a second signal of the two signals is input, the plurality of second gate electrodes being electrically connected to the second gate bus bar, and a second drain bus bar provided so as to dispose the plurality of second gate electrodes and the plurality of second drain electrodes between the second gate bus bar and the second drain bus bar, the plurality of second drain electrodes being electrically connected to the second drain bus bar, a combining node provided on the substrate and combining the first signal amplified by the first transistor and the second signal amplified by the second transistor, a first line provided on the substrate and connecting the first drain bus bar and the combining node, and a second line provided on the substrate, connecting the second drain bus bar and the combining node, and connected to a second end of the second drain bus bar located diagonally across the second transistor with respect to the first end.

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