METHOD FOR INTEGRATING SIGE NPN AND VERTICAL PNP DEVICES ON A SUBSTRATE AND RELATED STRUCTURE
    1.
    发明公开
    METHOD FOR INTEGRATING SIGE NPN AND VERTICAL PNP DEVICES ON A SUBSTRATE AND RELATED STRUCTURE 审中-公开
    方法SIGE NPN和垂直PNP组分对基材和相关结构整合

    公开(公告)号:EP1733425A1

    公开(公告)日:2006-12-20

    申请号:EP05725796.6

    申请日:2005-03-17

    IPC分类号: H01L21/8228

    摘要: According to one exemplary embodiment, a method for forming an NPN and a vertical PNP device on a substrate comprises forming an insulating layer over an NPN region and a PNP region of the substrate. The method further comprises forming a buffer layer on the insulating layer and forming an opening in the buffer layer and the insulating layer in the NPN region, where the opening exposes the substrate. The method further comprises forming a semiconductor layer on the buffer layer and in the opening in the NPN region, where the semiconductor layer has a first portion situated in the opening and a second portion situated on the buffer layer in the PNP region. The first portion of the semiconductor layer forms a single crystal base of the NPN device and the second portion of the semiconductor layer forms a polycrystalline emitter of the vertical PNP device.