公开(公告)号：EP4439651A1

公开(公告)日：2024-10-02

申请号：EP23164898.1

申请日：2023-03-29

申请人： Nexperia B.V.

发明人： Patel, Hamza Hanif ,  Yogeswaran, Nivasan ,  Gajda, Mark Andrzej

IPC分类号： H01L23/31 ,  H01L23/00 ,  H01L29/06 ,  H01L23/29 ,  H01L23/482

CPC分类号： H01L23/562 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/4824 ,  H01L29/06

摘要： A method of manufacturing a semiconductor device, such as a power MOSFET, comprising: forming a metal layer, the metal layer including an edge where the metal layer ends; forming a passivation layer at a layer higher than the metal layer; and forming a passivation slot in the passivation layer, wherein the passivation slot is at least partially positioned over the metal layer, and wherein the passivation slot divides the passivation layer into multiple regions, wherein each region experiences a reduced tensile stress σSiNx as a result of the passivation slot.

公开(公告)号：EP4451325A1

公开(公告)日：2024-10-23

申请号：EP24167890.3

申请日：2024-03-29

申请人： Nexperia B.V.

发明人： Patel, Hamza Hanif ,  Yogeswaran, Nivasan ,  Gajda, Mark Andrzej

IPC分类号： H01L23/31 ,  H01L23/00 ,  H01L29/06 ,  H01L23/29 ,  H01L23/482

摘要： A method of manufacturing a semiconductor device, such as a power MOSFET, comprising: forming a metal layer, the metal layer including an edge where the metal layer ends; forming a passivation layer at a layer higher than the metal layer; and forming a passivation slot in the passivation layer, wherein the passivation slot is at least partially positioned over the metal layer, and wherein the passivation slot divides the passivation layer into multiple regions, wherein each region experiences a reduced tensile stress σ SiNx as a result of the passivation slot.