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公开(公告)号:EP1538666B1
公开(公告)日:2011-09-14
申请号:EP03815737.6
申请日:2003-07-14
发明人: ITOH, Rie c/o Matsuhita Electric Industrial Co.,Ltd., IPROC , MATSUNO, Noriaki c/o Matsuhita Electric Industrial Co.,Ltd., IPROC , TSUNODA, Masato c/o Matsuhita Electric Industrial Co.,Ltd., IPROC
IPC分类号: H01L21/82 , H01L27/04 , H01L21/3205 , G06F1/04 , H01L23/58 , H01L23/498 , H01L23/538
CPC分类号: H01L23/576 , H01L23/5222 , H01L23/5225 , H01L23/528 , H01L2924/0002 , Y10S257/922 , H01L2924/00
摘要: A semiconductor integrated circuit device (10) comprising an LSI function section (11), and a shield wiring layer (22) formed thereon. The LSI function section (11) comprises a semiconductor substrate (12) and a first insulation film (13) wherein a circuit element including an MOS transistor (14), for example, is formed on the semiconductor substrate (12). The shield wiring layer (22) comprises a lower shield wiring (23), a third insulation film (24), an upper shield wiring (25), and a fourth insulation film (26) formed sequentially on a second insulation film (17). Arranging directions of the lower shield wiring (23) and the upper shield wiring (25) intersect perpendicularly.
摘要翻译: 一种半导体集成电路器件(10),包括一个LSI功能部分(11)和一个形成在其上的屏蔽布线层(22)。 LSI功能部分11包括半导体衬底12和第一绝缘膜13,其中例如包括MOS晶体管14的电路元件形成在半导体衬底12上。 屏蔽布线层22包括依次形成在第二绝缘膜17上的下部屏蔽布线23,第三绝缘膜24,上部屏蔽布线25和第四绝缘膜26, 。 布置下屏蔽布线(23)和上屏蔽布线(25)的方向垂直相交。