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公开(公告)号:EP1031131B1
公开(公告)日:2010-10-27
申请号:EP99943329.5
申请日:1999-09-14
IPC分类号: G09G3/28
CPC分类号: G09G3/2003 , G09G3/2029 , G09G3/288 , G09G2320/0626 , G09G2330/021 , G09G2330/045
摘要: This invention provides a display apparatus having high accuracy to control automatically power consumed for display operation suitable for emission-type display apparatus like a plasma display apparatus, electroluminescence display apparatus and a light emission diode display apparatus. The display apparatus comprises an emission unit (27), integrating circuits (11, 12, 13) for integrating input picture signals of R, G and B for each predetermined period to output average levels of R signal, G signal and B signal, respectively, multiplying circuits (14, 15, 16) for multiplying those average levels by their respective parameters KR, KG and KB, respectively, an adder (17) for obtaining a signal indicating expected consumption power on the emission unit by adding output signals from the multiplying circuits, a controller (18) for receiving the power prediction signal to output a control signal based on the received signal, and a brightness control circuit for controlling light emission amount per unit area according to the control signal.
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2.
公开(公告)号:EP1164568B1
公开(公告)日:2011-08-24
申请号:EP00977939.8
申请日:2000-11-24
发明人: MUTO, Yasuaki , WAKAHARA, Toshio , NIWA, Akio , HIGASHI, Takuma , MORITA, Tomoko , SEKIGUCHI, Yuji
CPC分类号: H04N7/0105 , H04N5/46 , H04N7/01 , H04N7/012 , H04N7/0135 , H04N21/440218
摘要: Video data on a field necessary for IP conversion and scanning line conversion is stored in a field memory section (7). Using the data stored in the field memory section a memory control section (2) performs vertical frequency conversion. An IP conversion section (3) performs IP conversion. A scanning line conversion section (4) performs scanning line conversion. A horizontal pixel conversion section(5) performs horizontal pixel conversion. A synchronization section (6) gives a predetermined clock, vertical and horizontal synchronizing signals to each block. Thus a single system performs vertical frequency conversion, IP conversion, scanning line conversion and horizontal pixel conversion.
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公开(公告)号:EP1536643B1
公开(公告)日:2011-06-15
申请号:EP03746485.6
申请日:2003-04-14
发明人: KASAHARA, Mitsuhiro , DAIGI, Tomoaki , KAWAMURA, Hideaki , NAKAHIGASHI, Hideto , MORITA, Tomoko
IPC分类号: H04N7/01
CPC分类号: H04N7/012 , H04N5/144 , H04N7/0137
摘要: According to an interlace video signal which has been input, a plurality of interlace video signals corresponding to a plurality of continuous fields are generated by a first, a second, and a third one-field delay circuit. According to a plurality of interlace video signals, a first progressive video field signal is generated by a first progressive video generation circuit. According to a plurality of interlace video signals, a second progressive video field signal is generated by a second progressive video generation circuit. According to the first progressive video field signal and the second progressive video field signal, image vertical-direction motion amount information is calculated by a comparison circuit.
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