SYSTEMS AND METHODS FOR IMPROVING EFFICIENCY IN A POWER MANAGEMENT CIRCUIT

    公开(公告)号:EP4451532A1

    公开(公告)日:2024-10-23

    申请号:EP24168774.8

    申请日:2024-04-05

    申请人: Qorvo US, Inc.

    IPC分类号: H02M1/00 H02M3/158

    摘要: Systems and methods for improving efficiency in a power management circuit are disclosed. In one aspect, a ping-pong sample and hold circuit smooth transitions from buck to boost (and vice versa) modes of operation for a direct current-to-direct current (DC-DC) converter in the power management circuit. The ping-pong sample and hold circuit provide a ramp compensation for each clock cycle, where transitions are smoothed by holding the last value used from the previous mode of operation. In a second aspect, a current sensor is used that integrates a current value to provide a base feedback loop for the DC-DC converter and may use various compensation factors to provide a proper ramp signal for the DC-DC converter.

    COMPACT LOW NOISE AMPLIFIER SYSTEM
    2.
    发明公开

    公开(公告)号:EP4266576A1

    公开(公告)日:2023-10-25

    申请号:EP23166771.8

    申请日:2023-04-05

    申请人: Qorvo US, Inc.

    摘要: Disclosed is a low noise amplifier system (10). Included is a main amplifier (24) having a main input coupled to a RF input and a main output connected to an RF output and an impedance amplifier (12) having an impedance input coupled to the RF input and an impedance output coupled to the RF output, wherein the impedance amplifier (12) is configured to provide input impedance matching to the main amplifier (24). The impedance amplifier (12) also provides a first noise path that passes through the impedance amplifier (12) such that the noise generated by the impedance amplifier (12) is substantially out of phase with the noise that passes through a second noise path that passes through the main amplifier (24).

    DOHERTY POWER AMPLIFIER SYSTEM
    4.
    发明公开

    公开(公告)号:EP4293897A2

    公开(公告)日:2023-12-20

    申请号:EP23175748.5

    申请日:2023-05-26

    申请人: Qorvo US, Inc.

    摘要: A Doherty amplifier system is disclosed. The Doherty amplifier system includes a carrier amplifier having a carrier input and a carrier output, and a peaking amplifier having a peaking input coupled to the carrier input and a peaking output coupled to the carrier output. Analog pre-distortion circuitry is configured to linearize the carrier amplifier and linearize the peaking amplifier by compensating for base-to-collector capacitance loading of the carrier amplifier and the peaking amplifier during operation.

    LOW NOISE AMPLIFIER (LNA) WITH DISTORTION AND NOISE CANCELLATION

    公开(公告)号:EP4280456A1

    公开(公告)日:2023-11-22

    申请号:EP23174050.7

    申请日:2023-05-17

    申请人: Qorvo US, Inc.

    摘要: Low noise amplifiers (LNAs) are disclosed. In one aspect, an LNA may have distortion cancellation that is orthogonally implemented relative to noise cancellation such that changes to the distortion cancellation do not affect the noise cancellation. In further example aspects, cancellation circuitry is added in parallel to a main or primary LNA path. The cancellation circuitry may include an initial impedance matching amplifier (200B) that effectuates noise cancellation and a second amplifier (202A) that effectuates distortion cancellation. Variations in the placement and composition of the second amplifier are provided. By providing a second path that allows for independent control of noise and distortion cancellation, overall performance of the LNA is improved.

    DRIVING AMPLIFIER STAGE WITH LOW OUTPUT IMPEDANCE

    公开(公告)号:EP4220953A1

    公开(公告)日:2023-08-02

    申请号:EP23153991.7

    申请日:2023-01-30

    申请人: Qorvo US, Inc.

    IPC分类号: H03F3/195 H03F3/30 H03F3/45

    摘要: A driving amplifier (200) with low output impedance is disclosed. In one aspect, a driving amplifier stage (202) that does not need an inter-stage impedance matching network between the driving amplifier stage (202) and an output amplifier stage (208) in a transmission chain may be achieved by providing stacking transconductance devices within the driving amplifier stage (202) and reusing a supply current to provide an intermediate signal with high current but moderated voltage swing to drive the output amplifier stage (208). In specifically contemplated aspects, the stacked transconductance devices may be complementary metal oxide semiconductor (CMOS) field effect transistors (FETs).

    LOW NOISE AMPLIFIER WITH PARASITIC CAPACITANCE NEUTRALIZATION

    公开(公告)号:EP4266575A1

    公开(公告)日:2023-10-25

    申请号:EP23166775.9

    申请日:2023-04-05

    申请人: Qorvo US, Inc.

    摘要: Disclosed is a low noise amplifier system (10). Included is a main amplifier (24) having a main input coupled to a RF input (16) and a main output connected to an RF output (20) and an impedance amplifier (12) having an impedance input coupled to the RF input (16) and an impedance output coupled to the RF output (20), wherein the impedance amplifier (12) is configured to provide input impedance matching to the main amplifier (24). The impedance amplifier (12) also provides a first noise path that passes through the impedance amplifier (12) such that the noise generated by the impedance amplifier (12) is substantially out of phase with the noise that passes through a second noise path that passes through the main amplifier (24). A neutralization amplifier (56, 62) is configured to reduce parasitic capacitive loading within the first noise path.

    AMPLITUDE MODULATION-PHASE MODULATION (AM-PM) LINEARIZATION IN A POWER AMPLIFIER USING BIAS CIRCUITRY

    公开(公告)号:EP4262084A1

    公开(公告)日:2023-10-18

    申请号:EP23165650.5

    申请日:2023-03-30

    申请人: Qorvo US, Inc.

    IPC分类号: H03F1/22 H03F1/52 H03F3/193

    摘要: Amplitude modulation-phase modulation (AM-PM) linearization in a power amplifier (200) using bias circuitry, which fixes a bias of a cascode transistor within a power amplifier is disclosed. In particular, the cascode transistor may switch between operation in a saturation mode and a triode mode. The bias is set such that the cascode transistor operates at a fixed duty cycle in the triode mode relative to the saturation mode for a wide range of signal levels from small-signal to large-signal. An example duty cycle is fifty percent (50%), although other duty cycles may be used. This bias will result in a constant capacitance contributed by the cascode device to the power amplifier over a wide signal level range.