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1.发明公开NEGATIVE SUPPLY RAIL POSITIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-EFFECT TRANSISTOR (PFET) WRITE PORT(S), AND RELATED SYSTEMS AND METHODS 审中-公开用于使用P型场效应晶体管（PFET）写入端口的记忆位单元的负电源轨正极升压写助手电路及相关系统和方法
公开(公告)号：EP3262649A1
公开(公告)日：2018-01-03
申请号：EP16713640.7
申请日：2016-02-02
发明人： JEONG, Jihoon , ATALLAH, Francois, Ibrahim , BOWMAN, Keith, Alan , HANSQUINE, David, Joseph Winston , NGUYEN, Hoan, Huu
IPC分类号： G11C8/08 , G11C11/419
CPC分类号： G11C11/00 , G11C5/14 , G11C7/12 , G11C8/08 , G11C11/413 , G11C11/419 , G11C15/04 , G11C29/00
摘要： Write-assist circuits for memory bit cells (“bit cells”) employing a P-type Field-Effect transistor (PFET) write port(s) are disclosed. Related methods and systems are also disclosed. It has been observed that as node technology is scaled down in size, PFET drive current (i.e., drive strength) exceeds N-type Field-Effect transistor (NFET) drive current for like-dimensioned FETs. In this regard, in one aspect, it is desired to provide bit cells having PFET write ports, as opposed to NFET write ports, to reduce memory write times to the bit cells, and thus improve memory performance. To mitigate a write contention that could otherwise occur when writing data to bit cells, a write-assist circuit provided in the form of negative wordline boost circuit can be employed to strengthen a PFET access transistor in a memory bit cell having a PFET write port(s).
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2.发明公开WORDLINE NEGATIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-EFFECT TRANSISTOR (PFET) WRITE PORT(S), AND RELATED SYSTEMS AND METHODS 审中-公开用于使用P型场效应晶体管（PFET）写入端口的存储器位单元的字线负电源写入辅助电路及相关系统和方法
公开(公告)号：EP3262648A1
公开(公告)日：2018-01-03
申请号：EP16704341.3
申请日：2016-02-02
发明人： JEONG, Jihoon , ATALLAH, Francois, Ibrahim , BOWMAN, Keith, Alan , HANSQUINE, David, Joseph Winston , NGUYEN, Hoan, Huu
IPC分类号： G11C8/08 , G11C11/419
CPC分类号： G11C11/00 , G11C5/14 , G11C7/12 , G11C8/08 , G11C11/413 , G11C11/419 , G11C15/04 , G11C29/00
摘要： Write-assist circuits for memory bit cells (“bit cells”) employing a P-type Field-Effect transistor (PFET) write port(s) are disclosed. Related methods and systems are also disclosed. It has been observed that as node technology is scaled down in size, PFET drive current (i.e., drive strength) exceeds N-type Field-Effect transistor (NFET) drive current for like-dimensioned FETs. In this regard, in one aspect, it is desired to provide bit cells having PFET write ports, as opposed to NFET write ports, to reduce memory write times to the bit cells, and thus improve memory performance. To mitigate a write contention that could otherwise occur when writing data to bit cells, a write-assist circuit provided in the form of negative wordline boost circuit can be employed to strengthen a PFET access transistor in a memory bit cell having a PFET write port(s).
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3.发明公开BITLINE POSITIVE BOOST WRITE-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-EFFECT TRANSISTOR (PFET) WRITE PORT(S), AND RELATED SYSTEMS AND METHODS 审中-公开针对使用P型场效应晶体管（PFET）写入端口的记忆位单元的位线正增压写辅助电路及相关系统和方法
公开(公告)号：EP3262647A1
公开(公告)日：2018-01-03
申请号：EP16704772.9
申请日：2016-02-02
发明人： JEONG, Jihoon , ATALLAH, Francois, Ibrahim , BOWMAN, Keith, Alan , HANSQUINE, David, Joseph Winston , NGUYEN, Hoan, Huu
IPC分类号： G11C7/12 , G11C11/419
CPC分类号： G11C11/00 , G11C5/14 , G11C7/12 , G11C8/08 , G11C11/413 , G11C11/419 , G11C15/04 , G11C29/00
摘要： Write-assist circuits for memory bit cells (“bit cells”) employing a P-type Field-Effect transistor (PFET) write port(s) are disclosed. Related methods and systems are also disclosed. It has been observed that as node technology is scaled down in size, PFET drive current (i.e., drive strength) exceeds N-type Field-Effect transistor (NFET) drive current for like-dimensioned FETs. In this regard, in one aspect, it is desired to provide bit cells having PFET write ports, as opposed to NFET write ports, to reduce memory write times to the bit cells, and thus improve memory performance. To mitigate a write contention that could otherwise occur when writing data to bit cells, a write-assist circuit provided in the form of negative wordline boost circuit can be employed to strengthen a PFET access transistor in a memory bit cell having a PFET write port(s).
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4.发明公开P-TYPE FIELD-EFFECT TRANSISTOR (PFET)-BASED SENSE AMPLIFIERS FOR READING PFET PASS-GATE MEMORY BIT CELLS, AND RELATED MEMORY SYSTEMS AND METHODS 审中-公开用于读取PFET通过存储器位单元的P型场效应晶体管（PFET）基感测放大器及相关存储器系统和方法
公开(公告)号：EP3262644A2
公开(公告)日：2018-01-03
申请号：EP16704773.7
申请日：2016-02-02
发明人： NGUYEN, Hoan, Huu , ATALLAH, Francois, Ibrahim , BOWMAN, Keith, Alan , HANSQUINE, David, Joseph Winston , JEONG, Jihoon
IPC分类号： G11C7/06 , G11C7/08 , G11C11/412 , G11C11/419 , G11C11/418
CPC分类号： G11C11/419 , G11C7/065 , G11C7/08 , G11C11/412 , G11C11/418
摘要： P-type Field-effect Transistor (PFET)-based sense amplifiers for reading PFET pass-gate memory bit cells (“bit cells”) are disclosed. Related methods and systems are also disclosed. Sense amplifiers are provided in a memory system to sense bit line voltage(s) of the bit cells for reading the data stored in the bit cells. It has been observed that as node technology is scaled down in size, PFET drive current (i.e., drive strength) exceeds N-type Field-effect Transistor (NFET) drive current due for like-dimensioned FETs. In this regard, in one aspect, PFET-based sense amplifiers are provided in a memory system to increase memory read times to the bit cells, and thus improve memory read performance.
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公开(公告)号：EP3262650B1
公开(公告)日：2019-04-24
申请号：EP16704777.8
申请日：2016-02-02
发明人： ATALLAH, Francois, Ibrahim , BOWMAN, Keith, Alan , HANSQUINE, David, Joseph Winston , JEONG, Jihoon , NGUYEN, Hoan, Huu
IPC分类号： G11C11/412 , H01L27/11 , G11C11/418
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6.发明公开DYNAMIC TAG COMPARE CIRCUITS EMPLOYING P-TYPE FIELD-EFFECT TRANSISTOR (PFET)-DOMINANT EVALUATION CIRCUITS FOR REDUCED EVALUATION TIME, AND RELATED SYSTEMS AND METHODS 审中-公开使用P型场效应晶体管（PFET） - 用于降低评估时间的主导评估电路的动态标签比较电路以及相关的系统和方法
公开(公告)号：EP3262652A2
公开(公告)日：2018-01-03
申请号：EP16704775.2
申请日：2016-02-02
发明人： BOWMAN, Keith, Alan , ATALLAH, Francois, Ibrahim , HANSQUINE, David, Joseph Winston , JEONG, Jihoon , NGUYEN, Hoan, Huu
IPC分类号： G11C15/04
CPC分类号： G11C15/04 , G11C11/40 , H03K19/00315 , H03K19/094
摘要： Dynamic tag compare circuits employing P-type Field-Effect Transistor (PFET)-dominant evaluation circuits for reduced evaluation time, and thus increased circuit performance, are provided. A dynamic tag compare circuit may be used or provided as part of searchable memory, such as a register file or content-addressable memory (CAM), as non-limiting examples. The dynamic tag compare circuit includes one or more PFET-dominant evaluation circuits comprised of one or more PFETs used as logic to perform a compare logic function. The PFET-dominant evaluation circuits are configured to receive and compare input search data to a tag(s) (e.g., addresses or data) contained in a searchable memory to determine if the input search data is contained in the memory. The PFET-dominant evaluation circuits are configured to control the voltage/value on a dynamic node in the dynamic tag compare circuit based on the evaluation of whether the received input search data is contained in the searchable memory.
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7.发明公开READ-ASSIST CIRCUITS FOR MEMORY BIT CELLS EMPLOYING A P-TYPE FIELD-EFFECT TRANSISTOR (PFET) READ PORT(S), AND RELATED MEMORY SYSTEMS AND METHODS 审中-公开用于使用P型场效应晶体管（PFET）读端口的存储器位单元的读辅助电路以及相关的存储器系统和方法
公开(公告)号：EP3262650A2
公开(公告)日：2018-01-03
申请号：EP16704777.8
申请日：2016-02-02
发明人： ATALLAH, Francois, Ibrahim , BOWMAN, Keith, Alan , HANSQUINE, David, Joseph Winston , JEONG, Jihoon , NGUYEN, Hoan, Huu
IPC分类号： G11C11/412 , H01L27/11 , G11C11/418
CPC分类号： G11C29/52 , G11C11/00 , G11C11/412 , G11C11/418 , G11C11/419 , H01L27/11 , H01L27/1104
摘要： Read-assist circuits for memory bit cells employing a P-type Field-Effect Transistor (PFET) read port(s) are disclosed. Related memory systems and methods are also disclosed. It has been observed that as node technology is scaled down in size, PFET drive current (i.e., drive strength) exceeds N-type FET (NFET) drive current for like-dimensioned FETs. In this regard, in one aspect, it is desired to provide memory bit cells having PFET read ports, as opposed to NFET read ports, to increase memory read times to the memory bit cells, and thus improve memory read performance. To mitigate or avoid a read disturb condition that could otherwise occur when reading the memory bit cell, read-assist circuits are provided for memory bit cells having PFET read ports.
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