公开(公告)号：EP0550404B1

公开(公告)日：2002-05-15

申请号：EP93102713.0

申请日：1985-11-05

申请人： ROHM CORPORATION

发明人： Mukherjee Satyen ,  Chang,Thomas

IPC分类号： H01L21/28

CPC分类号： H01L29/0847 ,  G11C16/0416 ,  G11C16/10 ,  G11C16/16 ,  H01L21/28273 ,  H01L21/321 ,  H01L27/115 ,  H01L29/511 ,  H01L29/518 ,  H01L29/66825 ,  H01L29/7885

摘要： An electrically erasable programmable memory device which is programmable in the manner of an EPROM and erasable in the manner of an EEPROM. A dielectric layer between the control gate and the floating gate is provided having a high dielectric constant. A thin, uniform gate dielectric layer is provided which demonstrates minimal trapping. Finally, an asymmetrical source/drain junction is provided wherein the source includes a shallow portion and a deeper portion, which deeper portion defines the overlap between the source and the floating gate. In the preferred embodiment the dielectric between the control gate and the floating gate comprises tantalum pentoxide, the thin dielectric layer comprises oxynitride, and the deep diffusion portion of the source comprises phosphorous.

公开(公告)号：EP0550404A1

公开(公告)日：1993-07-07

申请号：EP93102713.0

申请日：1985-11-05

申请人： ROHM CORPORATION

发明人： Mukherjee Satyen ,  Chang,Thomas

IPC分类号： H01L21/28

CPC分类号： H01L29/0847 ,  G11C16/0416 ,  G11C16/10 ,  G11C16/16 ,  H01L21/28273 ,  H01L21/321 ,  H01L27/115 ,  H01L29/511 ,  H01L29/518 ,  H01L29/66825 ,  H01L29/7885

摘要： A method of making a capacitive coupling device, especially in a transistor of an EEPROM, and such device. The interpoly dielectric layer (66) between control gate (68) and floating gate (64) consists of a thin layer of oxide and a layer of tantalum pentoxide so as to obtain a high capacitance value with a small physical size. This allows EEPROM cells which require substantially lower programming and erasing voltages.

摘要翻译： 一种制造电容耦合装置的制造方法，在EEPROM的一个晶体管，并且这样的设备特别喜欢。 控制栅极（68）和浮置栅极（64）besteht氧化物的薄层的和，以获得具有小的物理尺寸高电容值五氧化二钽的层之间的层间电介质层（66）。 这使那些需要大幅降低编程和擦除电压EEPROM单元。