公开(公告)号：EP1483793A2

公开(公告)日：2004-12-08

申请号：EP03727583.1

申请日：2003-03-12

申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ,  S.O.I. Tec Silicon on Insulator Technologies

发明人： TEMPLIER, François ,  BILLON, Thierry ,  DAVAL, Nicolas

IPC分类号： H01L29/872

CPC分类号： H01L29/6606 ,  H01L21/0475 ,  H01L21/0495 ,  H01L29/1608 ,  H01L29/78684 ,  H01L29/8126 ,  H01L29/872 ,  Y10S438/931

摘要： The invention relates to a power junction device comprising: a SiCOI-type substrate with a silicon carbide layer (16) which is insulated from a solid support (12) by means of an insulating buried layer (14), and at least one Schottky contact between a first metallic layer (40) and the silicon carbide surface layer (16), said first metallic layer (30) forming an anode.

公开(公告)号：EP1535326A2

公开(公告)日：2005-06-01

申请号：EP03762848.4

申请日：2003-07-09

申请人： S.O.I. Tec Silicon on Insulator Technologies

发明人： GHYSELEN, Bruno ,  AULNETTE, Cécile ,  OSTERNAUD, Bénédite ,  DAVAL, Nicolas

IPC分类号： H01L21/762

CPC分类号： H01L21/76259 ,  H01L21/76254

摘要： Method of producing a structure comprising a thin layer of semiconductor material obtained from a wafer (10), the wafer (10) comprising a lattice parameter matching layer (2) comprising an upper layer of semiconductor material having a first lattice parameter, a film (3) of semiconductor material having a nominal lattice parameter substantially different from the first lattice parameter, said grown film (3) being strained by the matching layer (2), a relaxed layer (4) a nominal lattice parameter to substantially identical to the first lattice parameter, the method comprising transfer of the relaxed layer (4) and the strained film (3) to a receiving substrate (5) and enrichment in an element other than silicon of the relaxed layer (4), thus increasing the relaxed layer (4) lattice parameter.

公开(公告)号：EP1535326B1

公开(公告)日：2009-09-09

申请号：EP03762848.4

申请日：2003-07-09

申请人： S.O.I. Tec Silicon on Insulator Technologies

发明人： GHYSELEN, Bruno ,  AULNETTE, Cécile ,  OSTERNAUD, Bénédite ,  DAVAL, Nicolas

IPC分类号： H01L21/762

CPC分类号： H01L21/76259 ,  H01L21/76254

公开(公告)号：EP1483793B1

公开(公告)日：2011-08-31

申请号：EP03727583.1

申请日：2003-03-12

申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives ,  S.O.I. Tec Silicon on Insulator Technologies

发明人： TEMPLIER, François ,  BILLON, Thierry ,  DAVAL, Nicolas

IPC分类号： H01L29/872

CPC分类号： H01L29/6606 ,  H01L21/0475 ,  H01L21/0495 ,  H01L29/1608 ,  H01L29/78684 ,  H01L29/8126 ,  H01L29/872 ,  Y10S438/931

摘要： The invention relates to a power junction device comprising: a SiCOI-type substrate with a silicon carbide layer (16) which is insulated from a solid support (12) by means of an insulating buried layer (14), and at least one Schottky contact between a first metallic layer (40) and the silicon carbide surface layer (16), said first metallic layer (30) forming an anode.