摘要:
An electronic comparator device (1) with hysteresis, being of a type which comprises a differential cell (2) having a signal input (IN), an output (OUT), and a threshold input (S), further comprises a second differential cell (9) having one input (B9) connected to said output (OUT) and the other input (B10) connected to a controlling circuit portion (10) which has an output (E11) connected to the threshold input (S) to reduce the threshold voltage value (Vs) stepwise on the first change-over of the output (OUT) of the comparator (1).
摘要:
A broad operational range, automatic device for the change of frequency in the horizontal deflection of multi-synchronization monitors comprises an integrated circuit (2) incorporating, a frequency meter (3) being input an analog synchronization signal (S1), a phase comparator (14) having two inputs (15,16) and in turn receiving said synchronization signal (S1) on one input (15), a voltage (Vc)-controlled oscillator (12) adapted to output a signal (S3) whose frequency is depending on said voltage (Vc) and operatively linked to an output (22) of said phase comparator (14), and a counter (9) connected with its input, on the one side, to the oscillator (12) output, and on the other side, to the meter (3) output, said counter having an output (21) connected to the other input of the phase comparator (14) also forming the integrated circuit (2) output.
摘要:
The level detector comprises a first capacitance (1) having a charge circuit including a first transistor (3) controlled by the input signal to be detected (Vi) and a discharge circuit. A second capacitance (6) has a charge circuit including a second transistor (8) controlled by the input signal and a discharge circuit having at least one third transistor (17, 18) having pre-set electrical and geometrical characteristics. The above discharge circuits are connected to the respective inputs of a comparator (13) whose output is representative of the difference between the maximum amplitude of the input signal and a reference level depending on said electrical and geometrical characteristics of said third transistor (17, 18).
摘要:
A broad operational range, automatic device for the change of frequency in the horizontal deflection of multi-synchronization monitors comprises an integrated circuit (2) incorporating, a frequency meter (3) being input an analog synchronization signal (S1), a phase comparator (14) having two inputs (15,16) and in turn receiving said synchronization signal (S1) on one input (15), a voltage (Vc)-controlled oscillator (12) adapted to output a signal (S3) whose frequency is depending on said voltage (Vc) and operatively linked to an output (22) of said phase comparator (14), and a counter (9) connected with its input, on the one side, to the oscillator (12) output, and on the other side, to the meter (3) output, said counter having an output (21) connected to the other input of the phase comparator (14) also forming the integrated circuit (2) output.
摘要:
An electronic comparator device (1) with hysteresis, being of a type which comprises a differential cell (2) having a signal input (IN), an output (OUT), and a threshold input (S), further comprises a second differential cell (9) having one input (B9) connected to said output (OUT) and the other input (B10) connected to a controlling circuit portion (10) which has an output (E11) connected to the threshold input (S) to reduce the threshold voltage value (Vs) stepwise on the first change-over of the output (OUT) of the comparator (1).
摘要:
The level detector comprises a first capacitance (1) having a charge circuit including a first transistor (3) controlled by the input signal to be detected (Vi) and a discharge circuit. A second capacitance (6) has a charge circuit including a second transistor (8) controlled by the input signal and a discharge circuit having at least one third transistor (17, 18) having pre-set electrical and geometrical characteristics. The above discharge circuits are connected to the respective inputs of a comparator (13) whose output is representative of the difference between the maximum amplitude of the input signal and a reference level depending on said electrical and geometrical characteristics of said third transistor (17, 18).
摘要:
The circuit (1) comprises a closed control loop (2) including a voltage controlled oscillator (3), a frequency divider (4), a phase comparator (5), and a low-pass filter (6) cascade interconnected via respective inputs and outputs, with the filter (6) output connected to the oscillator (3) input to form the loop (2). The circuit further comprises a second comparator (10) connected in parallel to the phase comparator (5) between the frequency divider (4) output and the low-pass filter (6) input to compare a reference frequency (F1) to a frequency (F2) from the divider (4) when the values of such frequencies (F1,F2) lie far apart.
摘要:
The circuit (1) comprises a closed control loop (2) including a voltage controlled oscillator (3), a frequency divider (4), a phase comparator (5), and a low-pass filter (6) cascade interconnected via respective inputs and outputs, with the filter (6) output connected to the oscillator (3) input to form the loop (2). The circuit further comprises a second comparator (10) connected in parallel to the phase comparator (5) between the frequency divider (4) output and the low-pass filter (6) input to compare a reference frequency (F1) to a frequency (F2) from the divider (4) when the values of such frequencies (F1,F2) lie far apart.