Analog-to-digital conversion device
    1.
    发明公开
    Analog-to-digital conversion device 审中-公开
    模拟数字-Wandlersystem

    公开(公告)号:EP2690788A1

    公开(公告)日:2014-01-29

    申请号:EP12178324.5

    申请日:2012-07-27

    申请人: ST-Ericsson SA

    IPC分类号: H03M1/12

    CPC分类号: H03M1/12 H02J7/00 H03M1/129

    摘要: The present disclosure relates to an electronic analog-to-digital conversion device (100) which comprises:
    - an analog-to-digital conversion block (101) having a first input (1) for receiving a voltage signal (Vout) to be converted on the basis of a reference voltage signal (V REF ) provided to a second input (2) of the same analog-to-digital conversion block (101);
    - an input block (102) having an input terminal (3) and an output terminal (4) connected to the first input (1) of the analog-to-digital conversion block (101).
    The input block (102) is arranged for processing an input voltage signal (Vin) applied to the input terminal (3) to generate the voltage signal (Vout) at the output terminal (4). The input block (102) comprises:
    - a first resistive network (103) operatively connected to both the input terminal (3) and the output terminal (4);
    - a second resistive network (104) connected between the output terminal (4) and a reference potential (GND).
    The input block (102) is characterized by comprising an active network (105) connected between an output node (5) of the first resistive network (103) and the output terminal (4). The active network (105) has a first input terminal (6) directly connected to the second input (2) of the analog-to-digital conversion block (101) for receiving the same reference voltage signal (V REF ) provided to the second input (2) so that the input voltage signal (Vin) is processed by the input block (102) on the basis of such reference voltage signal (V REF ).

    摘要翻译: 本公开涉及一种电子模数转换装置(100),其包括: - 模数转换块(101),具有用于接收要转换的电压信号(Vout)的第一输入(1) 基于提供给同一模数转换块(101)的第二输入(2)的参考电压信号(V REF); - 具有连接到模数转换块(101)的第一输入(1)的输入端(3)和输出端(4)的输入块(102)。 输入块(102)被布置用于处理施加到输入端子(3)的输入电压信号(Vin),以在输出端子(4)产生电压信号(Vout)。 输入块(102)包括: - 可操作地连接到输入端(3)和输出端(4)的第一电阻网络(103)。 - 连接在输出端(4)和参考电位(GND)之间的第二电阻网络(104)。 输入块(102)的特征在于包括连接在第一电阻网络(103)的输出节点(5)和输出端(4)之间的有源网络(105)。 有源网络(105)具有直接连接到模拟 - 数字转换块(101)的第二输入(2)的第一输入端(6),用于接收与第二输入端相连的第二输入端 输入(2),使得输入电压信号(Vin)由输入块(102)基于这样的参考电压信号(V REF)来处理。

    Method of successive approximation A/D conversion
    2.
    发明公开
    Method of successive approximation A/D conversion 审中-公开
    Verfahren zur A / D-Umwandlung mit sukzessiverAnnäherung

    公开(公告)号:EP2600530A1

    公开(公告)日:2013-06-05

    申请号:EP11191807.4

    申请日:2011-12-02

    申请人: ST-Ericsson SA

    IPC分类号: H03M1/06 H03M1/42

    摘要: A method (100) of SAR - Successive Approximation Register - analog to digital conversion is disclosed. The method is such to perform N+1 SAR cycles for obtaining an output digital code having N bits. The method (100) comprises a step of receiving and sampling (101) an analog signal (V in ).
    After the execution of the first N-1 SAR cycles, the method (100) comprises the steps of:
    - performing (105) the N th SAR cycle by setting (106) a N th tentative analog signal corresponding to a provisional digital code (X P ) and comparing (107) the N th tentative analog signal with the sampled analog signal thus obtaining a N th comparison result;
    - performing (108) the (N+1) th SAR cycle by setting (109) a (N+1) th tentative analog signal on the basis of the N th comparison result, comparing (110) the (N+1) th tentative analog signal with the sampled analog signal thus obtaining a second comparison result and correcting (111) the provisional digital code (X P ) on the basis of the (N+1) th comparison result for obtaining the output digital code (X c ).
    Each of the comparisons is performed is such a way that the N th and (N+1) th SAR cycles comprise a plurality sub-comparisons in such a way that at the end of each of said cycles a set of sub-results is obtained. The last two comparison results are obtained taking into account the corresponding set of sub-results.

    摘要翻译: 公开了SAR - 逐次近似寄存器的方法(100) - 模数转换。 该方法是执行N + 1个SAR周期以获得具有N位的输出数字码。 方法(100)包括接收和采样(101)模拟信号(V in)的步骤。 在执行第一N-1个SAR周期之后,方法(100)包括以下步骤: - 通过设置(106)对应于临时数字码的第N个暂时模拟信号(105)来执行(105)第N个SAR周期 XP),并将第N个暂定模拟信号与采样的模拟信号进行比较(107),从而获得第N个比较结果; 根据第N个比较结果,设置(109)第(N + 1)个暂定模拟信号,执行(108)第(N + 1)个SAR周期,比较(110)第(N + 1) 从而获得第二比较结果并且基于用于获得输出数字码(X c)的第(N + 1)比较结果来校正(111)临时数字码(XP)(111)。 执行每个比较是使得第N和第(N + 1)个SAR周期包括多个子比较,使得在每个所述周期的结尾处获得一组子结果 。 考虑到相应的一组子结果,获得最后两个比较结果。