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公开(公告)号:EP4404065A1
公开(公告)日:2024-07-24
申请号:EP23220123.6
申请日:2023-12-22
CPC分类号: G06F11/3648 , G06F11/3636 , G06F11/1441
摘要: An apparatus (100) comprises debug circuitry (104) configured to perform debug operations on a processing system (106), and reset circuitry (102) configured to generate a trace and debug reset signal (110) and a main reset signal (112) based at least in part on an invoke reset signal (108). The main reset signal (112) is communicated to elements of the processing system (106), and the trace and debug reset signal (110) is communicated to elements of the debug circuitry (104).