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公开(公告)号:EP3926829A1
公开(公告)日:2021-12-22
申请号:EP21177180.3
申请日:2021-06-01
Applicant: STMicroelectronics S.r.l.
Inventor: RAIMONDI, Mr. Marco , GONANO, Mr. Giovanni
Abstract: A PWM modulator circuit (100) comprises a first half-bridge stage (121) having a first output node (OUTP) and a second half-bridge stage (122) having a second output node (OUTM). The first output node (OUTP) and the second output node (OUTM) are configured to have an electrical load (LD) coupled therebetween to apply thereto a PWM-modulated output signal. The circuit comprises a differential stage (10) having input nodes (InP, InM) configured to receive an input signal (an audio signal for a source S, for instance) applied between the input nodes (InP, InM) and produce a differential control signal (VcP, VcM) for the first half-bridge stage (121) and the second half-bridge stage (122). A current comparator (14) is arranged intermediate the differential stage (10) and the first (121) and second (122) half-bridge stages. The current comparator (14) is configured to produce a PWM-modulated drive signal (Drvin) to drive the half-bridge stages (121, 122) as a function of the input signal applied between the input nodes (InP, InM) in the differential stage (10).
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公开(公告)号:EP4007166A1
公开(公告)日:2022-06-01
申请号:EP21202997.9
申请日:2021-10-15
Inventor: LIN, Mr. Hong Wu , GONANO, Mr. Giovanni , BOTTI, Mr. Edoardo
Abstract: In an embodiment, a method for shaping a PWM signal includes: receiving an input PWM signal (V pwm _ out ); generating an output PWM signal (V pwm _ pre ) based on the input PWM signal by: when the input PWM signal (V pwm_out ) transitions with a first edge of the input PWM signal, transitioning the output PWM signal (V pwm _ pre ) with a first edge of the output PWM signal; and when the input PWM signal (V pwm_out ) transitions with a second edge before the first edge of the output PWM signal (V pwm_pre ) transitions, delaying a second edge of the output PWM signal (V pwm_pre ) based on the first edge of the output PWM signal.
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3.
公开(公告)号:EP3940938A1
公开(公告)日:2022-01-19
申请号:EP21183235.7
申请日:2021-07-01
Applicant: STMicroelectronics S.r.l.
Inventor: GONANO, Mr. Giovanni , RAIMONDI, Mr. Marco
Abstract: An electronic apparatus (10; 20) comprising a switching-type output power stage (14), in particular of a full-bridge or half-bridge type, which receives on an input of its own a driving signal ( PWM_in; PWM_out ) pulsed between two electrical levels and supplies at output an output power signal ( PWM_pow ),
said electronic apparatus (10; 20) comprising:
a modulator circuit (11) which carries out a pulse modulation, in particular a pulse-width modulation (PWM) and is configured for converting a continuous or digital electrical input signal ( Vi ) into an input signal ( PWM_in ) pulsed between two electrical levels, having a mean value proportional to the amplitude of the input signal ( Vi ); and
a circuit arrangement (17; 27; 37; 37') for controlling saturation of an output signal (Vout) supplied by the switching-type output power stage (14),
wherein:
said circuit arrangement comprises a pulse-remodulator circuit (17; 27; 37; 37'), which is set between the output of the modulator circuit (11) and the input of the switching-type output power stage (14) and is configured for supplying on an output of its own, as driving signal ( PWM_out ) to the switching-type output power stage (14), a respective modulated signal ( PWM_out ) pulsed between two electrical levels, said pulse-remodulator circuit (17; 27; 37; 37') being configured for:
measuring a pulse width ( W in , L in ) as pulse time interval ( W in , L in ) elapsing between two consecutive pulsed-signal edges of the pulsed input signal ( PWM_in ); and
if said measurement of the pulse width ( W in , L in ) indicates that the latter is below a given minimum value ( W min , L min ), remodulating said pulsed input signal ( PWM_in ), imposing equality between a pulse width ( W out , L out ) of the output pulsed signal ( PWM_out ) and said value of minimum width ( W min , L min ) and imposing equality between a value of modulation index ( D out ) of the output signal ( PWM_out ) and a value of modulation index ( D in ) of the input signal ( PWM_in ), applying a lengthening of the output period ( T out ).
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