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    Semiconductor package substrate, in particular for MEMS devices
    1.
    发明公开
    Semiconductor package substrate, in particular for MEMS devices 审中-公开
    GehäusesubstratfürHalbleiter，insbesonderefürMEMS Bauteile

    公开(公告)号：EP2272794A1

    公开(公告)日：2011-01-12

    申请号：EP10184071.8

    申请日：2006-07-14

    申请人： STMicroelectronics S.r.l. ,  STMicroelectronics Ltd (Malta)

    发明人： Ziglioli, Federico Giovanni ,  Graziosi, Giovanni ,  Shaw, Mark Andrew ,  Cortese, Mario Francesco ,  Cachia, Conrad Max

    IPC分类号： B81B7/00 ,  H01L23/498

    CPC分类号： B81B7/007 ,  B81B7/0048 ,  B81B2207/096 ,  B81C2203/0154 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor package comprising a substrate (20) and a damage-sensitive device (21), comprising a package substrate core (14) having an upper and a lower surface (14a, 14b), at least one pair of metal layers (12a, 12b, 13a, 13b) coating said upper and lower surfaces (14a, 14b) of the package substrate core (14); one pair of solder mask layers (11a, 11b) coating the outer metal layers (12a, 12b) of the at least one pair of metal layers (12a, 12b, 13a, 13b); and a plurality of vias (19) formed across the package substrate core (14) and the at least one pair of metal layers (12a, 12b, 13a, 13b) and a damage-sensitive device mounted on top of the upper solder mask layer. Advantageously, the plurality of vias (19) is substantially distributed according to a homogeneous pattern in an area (21 a) that is to be covered by the damage-sensitive device (21), a plurality of vias (19) being positioned so that the vias substantially coincide with an outline of said damage-sensitive device (21) that the semiconductor package substrate (20) is intended to support.
    A method for the production of such semiconductor package substrate is also described.

    摘要翻译： 一种包括基板（20）和损伤敏感装置（21）的半导体封装，包括具有上表面和下表面（14a，14b）的封装衬底芯（14），至少一对金属层（12a， 12b，13a，13b）涂覆所述封装基板芯（14）的所述上表面和下表面（14a，14b）; 一对涂覆至少一对金属层（12a，12b，13a，13b）的外金属层（12a，12b）的焊料掩模层（11a，11b） 以及形成在所述封装衬底芯（14）和所述至少一对金属层（12a，12b，13a，13b）之间的多个通孔（19）和安装在所述上焊接掩模层的顶部上的损伤敏感器件 。 有利地，多个通孔（19）根据待被损伤敏感设备（21）覆盖的区域（21a）中的均匀图案基本上分布，多个通孔（19）被定位成使得 通孔基本上与半导体封装衬底（20）旨在支撑的所述损伤敏感器件（21）的轮廓一致。 还描述了制造这种半导体封装基板的方法。

    Semiconductor package substrate, in particular for MEMS devices
    2.
    发明公开
    Semiconductor package substrate, in particular for MEMS devices 有权
    GehäusefürMEMS Bauteile

    公开(公告)号：EP1878692A1

    公开(公告)日：2008-01-16

    申请号：EP06014651.1

    申请日：2006-07-14

    申请人： STMicroelectronics S.r.l. ,  STMicroelectronics Ltd (Malta)

    发明人： Ziglioli, Federico Giovanni ,  Graziosi, Giovanni ,  Shaw, Mark Andrew ,  Cortese, Mario Francesco ,  Cachia, Conrad Max

    IPC分类号： B81B7/00 ,  H01L23/498

    CPC分类号： B81B7/007 ,  B81B7/0048 ,  B81B2207/096 ,  B81C2203/0154 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor package substrate (20) suitable for supporting a damage-sensitive device (21), comprising a package substrate core (14) having an upper and a lower surface (14a, 14b), at least one pair of metal layers (12a, 12b, 13a, 13b) coating said upper and lower surfaces (14a, 14b) of the package substrate core (14); one pair of solder mask layers (11a, 11b) coating the outer metal layers (12a, 12b) of the at least one pair of metal layers (12a, 12b, 13a, 13b); and a plurality of vias (19) formed across the package substrate core (14) and the at least one pair of metal layers (12a, 12b, 13a, 13b). Advantageously, the plurality of vias (19) is substantially distributed according to a homogeneous pattern in an area (21a) that is to be covered by the damage-sensitive device (21).
    A method for the production of such semiconductor package substrate is also described.

    摘要翻译： 一种适于支撑损伤敏感器件（21）的半导体封装衬底（20），包括具有上表面和下表面（14a，14b）的封装衬底芯（14），至少一对金属层（12a， 12b，13a，13b）涂覆所述封装基板芯（14）的所述上表面和下表面（14a，14b）; 一对涂覆至少一对金属层（12a，12b，13a，13b）的外金属层（12a，12b）的焊料掩模层（11a，11b） 以及形成在所述封装衬底芯（14）和所述至少一对金属层（12a，12b，13a，13b）之间的多个通孔（19）。 有利的是，多个通孔（19）在要被损伤敏感装置（21）覆盖的区域（21a）中根据均匀的图案基本分布。 还描述了制造这种半导体封装基板的方法。