公开(公告)号：EP2472572A1

公开(公告)日：2012-07-04

申请号：EP11196036.5

申请日：2011-12-29

申请人： STMicroelectronics Srl ,  STMicroelectronics Asia Pacific Pte Ltd.

发明人： Patti, Alfonso ,  Schillaci, Antonino ,  Marrone, Bartolomeo ,  Grasso, Gianleonardo ,  Kumar, Rajesh

IPC分类号： H01L21/331 ,  H01L29/732 ,  H01L29/40

CPC分类号： H01L29/402 ,  H01L29/66272 ,  H01L29/7322

摘要： A method is proposed for integrating a bipolar injunction transistor (100) in a die of semiconductor material having a main surface (105) covered by a sacrificial insulating layer (110), the die including a collector region (Rc) of a first type of conductivity extending from the main surface. The method includes the steps of forming an intrinsic base region (Rbi) of a second type of conductivity extending in the collector region from the main surface through an intrinsic base window (Wbi) of the sacrificial insulating layer, and forming an emitter region (Re) of the first type of conductivity extending in the intrinsic base region from the main surface through an emitter window (We) of the sacrificial insulating layer; in the solution according to an embodiment of the invention, the method further includes the steps of removing the sacrificial insulating layer, forming an intermediate insulating layer (115) on the main surface, the intermediate insulating layer having a thickness lower than a thickness of the sacrificial layer, and forming an extrinsic base region (Rbe) of the second type of conductivity extending in the intrinsic base region from the main surface through an extrinsic base window (Wbe) of the intermediate insulating layer, the extrinsic base region having a concentration of impurities higher than a concentration of impurities of the intrinsic base region and being separated from the emitter region by a portion of the intrinsic base region.

摘要翻译： 提出了一种用于将双极性抑制晶体管（100）集成在具有由牺牲绝缘层（110）覆盖的主表面（105）的半导体材料的管芯中的模具，该管芯包括第一类型的集电极区域（Rc） 电导率从主表面延伸。 该方法包括以下步骤：通过牺牲绝缘层的本征基本窗口（Wbi）从主表面形成在集电极区域中延伸的第二类型导电的本征基极区域（Rbi），并形成发射极区域 ），所述第一类型导电体在所述本征基极区域中从所述主表面延伸穿过所述牺牲绝缘层的发射极窗口（We）; 在根据本发明的实施例的方案中，该方法还包括以下步骤：去除牺牲绝缘层，在主表面上形成中间绝缘层（115），中间绝缘层的厚度低于 牺牲层，并且通过中间绝缘层的非本征基窗（Wbe）从主表面形成在本征基区中延伸的第二类导电的非本征基区（Rbe），所述非本征基区具有 杂质高于本征碱性区域的杂质浓度，并通过本征碱性区域的一部分与发射极区域分离。

公开(公告)号：EP2472572B1

公开(公告)日：2017-12-20

申请号：EP11196036.5

申请日：2011-12-29

申请人： STMicroelectronics Srl ,  STMicroelectronics Asia Pacific Pte Ltd.

发明人： Patti, Alfonso ,  Schillaci, Antonino ,  Marrone, Bartolomeo ,  Grasso, Gianleonardo ,  Kumar, Rajesh

IPC分类号： H01L21/331 ,  H01L29/732 ,  H01L29/40

CPC分类号： H01L29/402 ,  H01L29/66272 ,  H01L29/7322

摘要： A method is proposed for integrating a bipolar injunction transistor (100) in a die of semiconductor material having a main surface (105) covered by a sacrificial insulating layer (110), the die including a collector region (Rc) of a first type of conductivity extending from the main surface. The method includes the steps of forming an intrinsic base region (Rbi) of a second type of conductivity extending in the collector region from the main surface through an intrinsic base window (Wbi) of the sacrificial insulating layer, and forming an emitter region (Re) of the first type of conductivity extending in the intrinsic base region from the main surface through an emitter window (We) of the sacrificial insulating layer; in the solution according to an embodiment of the invention, the method further includes the steps of removing the sacrificial insulating layer, forming an intermediate insulating layer (115) on the main surface, the intermediate insulating layer having a thickness lower than a thickness of the sacrificial layer, and forming an extrinsic base region (Rbe) of the second type of conductivity extending in the intrinsic base region from the main surface through an extrinsic base window (Wbe) of the intermediate insulating layer, the extrinsic base region having a concentration of impurities higher than a concentration of impurities of the intrinsic base region and being separated from the emitter region by a portion of the intrinsic base region.