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1.
公开(公告)号:EP4439676A1
公开(公告)日:2024-10-02
申请号:EP24167319.3
申请日:2024-03-28
发明人: UNNI, Vineet , MACELWEE, Thomas
IPC分类号: H01L29/778 , H01L29/40 , H01L23/31 , H01L29/20 , H01L29/10
CPC分类号: H01L29/1066 , H01L29/2003 , H01L29/7786 , H01L29/66462 , H01L29/402 , H01L23/3171
摘要: A GaN semiconductor power transistor structure with a stepped gate field plate, and a method of fabrication is disclosed. The stepped gate field plate is formed using contact metal and/or interconnect metal. The stepped structure of the gate field plate is defined by dielectric etching to form openings for the stepped gate field plate, and the dielectric thickness under the gate field plate is sized and stepped to shape appropriately the electric field in the region between the gate and drain. The resulting stepped gate field plate structure is less sensitive to limitations of stepped field plates fabricated by a lift-off metal process.
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2.
公开(公告)号:EP4435870A1
公开(公告)日:2024-09-25
申请号:EP24162883.3
申请日:2024-03-12
发明人: MICCOLI, Cristina , IUCOLANO, Ferdinando , TRINGALI, Cristina , CASTAGNA, Maria Eloisa , CHINI, Alessandro
IPC分类号: H01L29/40 , G03F7/00 , H01L21/335 , H01L29/778 , H01L23/31 , H01L29/10 , H01L29/20
CPC分类号: H01L29/2003 , H01L29/7787 , H01L29/402 , H01L29/1066 , H01L29/66462 , G03F7/00 , H01L23/3171
摘要: An integrated power device includes a heterostructure (10), having a channel layer (2) and a barrier layer (3), a source contact (7), a drain contact (8), a gate region (5) and a gate contact (9) on the gate region (5). An insulating gate structure (15)has a first insulating gate portion (15a) and a second insulating gate portion (15b), which extend in a conformable way along sides (5a, 9a) of the gate region (5) and of the gate contact (9) that face the drain contact (8). An insulating field structure (13), having a first dielectric region (13a) on the barrier layer (3) and a second dielectric region (13b) selectively etchable with respect to the first dielectric region (13a), is arranged on the barrier layer (3) between the gate region (5) and the drain contact. A source field plate (12) extends over the insulating field structure (13). On a side of the insulating field structure (13) towards the gate region (5), the source field plate (12) is in contact with the first dielectric region (13a). The source field plate is in contact with the second insulating gate portion (15b; 115b; 215b) along the sides (5a, 9a).
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公开(公告)号:EP4401149A2
公开(公告)日:2024-07-17
申请号:EP24179818.0
申请日:2019-11-20
IPC分类号: H01L29/78
CPC分类号: H01L21/28088 , H01L29/4966 , H01L29/0847 , H01L29/41725 , H01L29/402 , H01L29/78 , H10N70/235 , H10N70/253 , H10N70/823 , H10N70/8828
摘要: An exemplary semiconductor incorporates phase change material MoxW1-xTe2 that may be the semiconducting channel or may be part of a control terminal/gate of the semiconductor. The phase change material selectably being in one of metal and insulator phases depending on whether a voltage field greater than a predetermined phase change field is present at the phase change material. The properties of the semiconductor are varied depending on the phase of the phase change material.
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公开(公告)号:EP4354511A2
公开(公告)日:2024-04-17
申请号:EP23195277.1
申请日:2023-09-05
发明人: ZIERAK, Michael J. , BENTLEY, Steven J. , SHARMA, Santosh , LEVY, Mark D. , KANTAROVSKY, Johnatan A.
IPC分类号: H01L29/41 , H01L29/10 , H01L29/20 , H01L29/778
CPC分类号: H01L29/778 , H01L29/2003 , H01L29/404 , H01L29/402 , H01L29/1066
摘要: A structure includes at least one gate structure (20, 22, 38) over semiconductor material (16), the at least one gate structure comprising an active layer (20), a gate metal (38) extending from the active layer and a sidewall spacer (34) on sidewalls of the gate metal; and a field plate (26) aligned with the at least one gate structure and isolated from the gate metal by the sidewall spacer.
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公开(公告)号:EP3343637A1
公开(公告)日:2018-07-04
申请号:EP17208753.8
申请日:2017-12-20
发明人: Ojima, Yusuke , Yokoi, Yoshihiko
IPC分类号: H01L29/739 , H01L29/423 , H01L29/49 , H01L29/78 , H01L27/088
CPC分类号: H03K17/168 , H01L27/088 , H01L29/1095 , H01L29/402 , H01L29/4236 , H01L29/4238 , H01L29/4983 , H01L29/66325 , H01L29/66348 , H01L29/7397 , H01L29/7813 , H02M3/158 , H02M7/537 , H02M2001/0009 , H03K17/04206 , H03K17/08148 , H03K2217/0081
摘要: To provide a semiconductor device capable of preventing a surge voltage at the time of turn-off without complicating a gate drive circuit and without increasing switching delay.
A semiconductor device has a configuration in which a plurality of transistors are equivalently coupled in parallel by including a plurality of control electrodes for controlling a current flowing between a first main electrode and a second main electrode. A resistance value of a transmission path of a control signal from a common control terminal varies with respect to each of the control electrodes.-
6.
公开(公告)号:EP3327790A1
公开(公告)日:2018-05-30
申请号:EP17203915.8
申请日:2017-11-27
申请人: NXP USA, Inc.
IPC分类号: H01L29/78 , H01L21/761 , H01L29/06 , H01L29/10
CPC分类号: H01L29/7823 , H01L21/26513 , H01L21/761 , H01L29/063 , H01L29/0634 , H01L29/0646 , H01L29/0653 , H01L29/0696 , H01L29/0869 , H01L29/0886 , H01L29/1083 , H01L29/36 , H01L29/402 , H01L29/4916 , H01L29/66681 , H01L29/7835
摘要: An example laterally diffused metal oxide semiconducting (LDMOS) device includes a semiconductor substrate of a first conductivity type, active MOS regions, and a lightly-doped isolation layer (LDIL) of a second conductivity type. The active MOS regions include source and drain regions and a plurality of PN junctions. The LDIL is formed above and laterally along the semiconductor substrate, and located between the semiconductor substrate and at least a part of the active MOS regions. The LDIL is doped with dopant of the second conductivity type to cause, in response to selected voltages applied to the LDMOS device, the plurality of PN junctions to deplete each other and to support a voltage drop between the source and drain regions along the LDIL.
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公开(公告)号:EP3159932A4
公开(公告)日:2018-04-18
申请号:EP15811392
申请日:2015-06-17
申请人: TOSHIBA KK
发明人: SUZUKI MARIKO , SAKAI TADASHI
IPC分类号: H01L29/861 , H01L21/205 , H01L21/28 , H01L21/329 , H01L29/06 , H01L29/08 , H01L29/16 , H01L29/40 , H01L29/417 , H01L29/868
CPC分类号: H01L21/205 , H01L21/28 , H01L29/08 , H01L29/1602 , H01L29/402 , H01L29/417 , H01L29/861 , H01L29/8613 , H01L29/868
摘要: According to one embodiment, a semiconductor device includes an n-type semiconductor layer containing diamond, a first electrode including a first portion, an intermediate layer, and a p-type semiconductor layer containing diamond. The intermediate layer contains at least any of a carbide, graphite, graphene, and amorphous carbon. The carbide contains at least any of Ti, Si, Al, W, Ni, Cr, Ca, Li, Ru, Mo, Zr, Sr, Co, Rb, K, Cu, and Na. The intermediate layer includes a first region provided between the first portion and the n-type semiconductor layer, and a second region provided around the first region when projected on a plane perpendicular to a direction from the n-type semiconductor layer to the first electrode. The second region does not overlap the first portion, and is continuous with the first region.
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公开(公告)号:EP3282484A1
公开(公告)日:2018-02-14
申请号:EP17172540.1
申请日:2016-08-10
发明人: HEINRICH, Klaus , LIEBING, Hartmut , ROTH, Andreas , EISENBRANDT, Stefan , OTT, Andreas , BOURY, Bruno
CPC分类号: G01R17/02 , G01R17/16 , G01R19/0084 , G01R19/0092 , H01L28/20 , H01L29/0649 , H01L29/0692 , H01L29/402 , H01L29/78 , H01L29/7838 , H01L29/8605
摘要: A high-voltage sensing device providing full galvanic isolation between a high-voltage domain and a low-voltage domain, wherein the circuit topology of the device resembles that of a Wheatstone bridge, the Wheatstone bridge employing at least one voltage-controlled semiconductor resistor, wherein the circuit also comprises a reference source connected directly to the Wheatstone bridge and the device comprises a number of shielding structures to electrically isolate the high-voltage domain from the low-voltage domain.
摘要翻译: 一种在高电压域和低电压域之间提供完全电流隔离的高电压感测设备,其中该设备的电路拓扑结构类似于惠斯登电桥的电路拓扑结构,惠斯登电桥采用至少一个电压控制的半导体电阻器, 其中所述电路还包括直接连接到所述惠斯通电桥的参考源,并且所述设备包括多个屏蔽结构以将所述高电压域与所述低电压域电隔离。
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公开(公告)号:EP3282265A1
公开(公告)日:2018-02-14
申请号:EP16183640.8
申请日:2016-08-10
发明人: HEINRICH, Klaus , LIEBING, Hartmut , ROTH, Andreas , EISENBRANDT, Stefan , OTT, Andreas , BOURY, Bruno
CPC分类号: G01R17/02 , G01R17/16 , G01R19/0084 , G01R19/0092 , H01L28/20 , H01L29/0649 , H01L29/0692 , H01L29/402 , H01L29/78 , H01L29/7838 , H01L29/8605
摘要: A high-voltage sensing device providing full galvanic isolation between a high-voltage domain and a low-voltage domain, wherein the circuit topology of the device resembles that of a Wheatstone bridge, the Wheatstone bridge employing at least one voltage-controlled semiconductor resistor, wherein the circuit also comprises a reference source connected directly to the Wheatstone bridge and the device comprises a number of shielding structures to electrically isolate the high-voltage domain from the low-voltage domain.
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公开(公告)号:EP2385558B1
公开(公告)日:2017-10-11
申请号:EP11176492.4
申请日:2008-01-16
申请人: Cree, Inc.
发明人: Heikman, Sten , Wu, Yifeng
IPC分类号: H01L29/778 , H01L21/335 , H01L29/40 , H01L29/423
CPC分类号: H01L29/7787 , H01L29/2003 , H01L29/402 , H01L29/404 , H01L29/475 , H01L29/66462
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