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    Method of driving display panel and display apparatus performing the method
    3.
    发明公开
    Method of driving display panel and display apparatus performing the method 审中-公开
    驱动显示面板和显示装置用于执行该方法的方法

    公开(公告)号：EP2469873A3

    公开(公告)日：2014-10-15

    申请号：EP11178079.7

    申请日：2011-08-19

    申请人： Samsung Display Co., Ltd.

    发明人： Lee, Byoung-Jun ,  Moon, Seung-Hwan ,  Kim, Yun-Jae ,  Goo, Nam-Hee ,  Kim, Myoung-Chul ,  Kim, Bo-Ram ,  Lee, Jong-Yoon

    IPC分类号： H04N13/04 ,  G09G3/00

    CPC分类号： G09G3/3614 ,  G09G3/003 ,  H04N13/359

    摘要： A method of driving a display panel determines whether an image mode of an image signal is a 2D flat image mode or a 3D stereoscopic image mode. A first reverse signal and a second reverse signal different from the first reverse signal are generated according to the image mode. The image signal is converted to a first polarity data voltage or a second polarity data voltage with respect to a reference voltage based on the first reverse signal or the second reverse signal, and the first polarity data voltage or the second polarity data voltage is outputted to a display panel. During the 3D stereoscopic image mode, polarities of data voltages are reversed at a period of a plurality of frames, so that display quality of the 3D stereoscopic image may be enhanced.

    Gate driving circuit and display apparatus having the same
    5.
    发明公开
    Gate driving circuit and display apparatus having the same 审中-公开
    Gate-Treiberschaltung和Anzeigevorrichtung damit

    公开(公告)号：EP2525350A1

    公开(公告)日：2012-11-21

    申请号：EP11192752.1

    申请日：2011-12-09

    申请人： Samsung Display Co., Ltd.

    发明人： Lee, Jae-Hoon ,  Koo, Bon-Yong ,  Moon, Seung-Hwan ,  Lee, Won-Hee

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3677 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0283 ,  G09G2310/0286

    摘要： A gate driving circuit includes a shift register and a vertical start line. The shift register includes first to N-th circuit stages sequentially providing first to N-th gate-on signals to first to N-th gate lines, respectively, at least one reverse dummy stage adjacent to the first circuit stage and at least one forward dummy stage adjacent to the N-th circuit stage (N is a natural number). The vertical start line is electrically connected to the first circuit stage or the N-th circuit stage according to a scan direction and transfers a vertical start signal to the first or N-th circuit stage.

    摘要翻译： 栅极驱动电路包括移位寄存器和垂直起始线。 移位寄存器包括分别向第一至第N栅极线提供第一至第N栅极导通信号的第一至第N电路级，与第一电路级相邻的至少一个反虚拟级和至少一个前向 与N级电路级相邻的虚拟级（N为自然数）。 垂直起始线根据扫描方向电连接到第一电路级或第N电路级，并将垂直启动信号传送到第一或第N电路级。

    Display panel and display apparatus having the same
    9.
    发明公开
    Display panel and display apparatus having the same 审中-公开
    显示面板和具有相同的显示装置

    公开(公告)号：EP2492908A3

    公开(公告)日：2012-11-07

    申请号：EP11189845.8

    申请日：2011-11-18

    申请人： Samsung Display Co., Ltd.

    发明人： Bae, Yu-Han ,  Lee, Jae-Hoon ,  Moon, Seung-Hwan

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3677 ,  G09G3/3648 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2300/0465 ,  G09G2310/02 ,  G09G2310/0243 ,  G09G2310/0251 ,  G09G2310/0281 ,  G09G2310/0283 ,  G09G2310/0286 ,  G09G2320/0223

    摘要： A display panel includes a display area, a peripheral area which includes a first peripheral area, and a second peripheral area opposite to the first peripheral area, a plurality of pixels in the display area, a plurality of data lines, a first gate line, a second gate line, a first gate driving circuit and a second gate driving circuit. Each data line corresponds to two pixel columns. The first gate line is at a first side of a pixel row. The second gate line is at a second side of the pixel row. The first gate driving circuit is in the first peripheral area and includes a first stage which provides a gate signal to the first gate line. The second gate driving circuit is in a second peripheral area of the display area and includes a second stage which provides a gate signal to the second gate line.

    摘要翻译： 显示面板包括显示区域，包括第一外围区域和与第一外围区域相对的第二外围区域的外围区域，显示区域中的多个像素，多条数据线，第一栅极线， 第二栅极线，第一栅极驱动电路和第二栅极驱动电路。 每条数据线对应于两个像素列。 第一栅极线位于像素行的第一侧。 第二栅极线位于像素行的第二侧。 第一栅极驱动电路位于第一外围区域中并且包括向第一栅极线提供栅极信号的第一级。 第二栅极驱动电路位于显示区域的第二外围区域中并且包括向第二栅极线提供栅极信号的第二级。