ELECTRONIC DEVICE HAVING BENDED DISPLAY AND METHOD FOR CONTROLLING THE SAME

    公开(公告)号:EP3767429A1

    公开(公告)日:2021-01-20

    申请号:EP20194395.8

    申请日:2017-11-16

    IPC分类号: G06F1/16 H04M1/02

    摘要: An electronic device having a bended display and a method for controlling the same. The electronic device includes a front display area and at least two separate side display areas that are physically connected with at least one side of the front display area and form a convex curved surface in at least one space between the front and the rear of the electronic device. The electronic device also includes and a non-display area that physically connects at least two side display areas of the at least two separate side display areas and forms a convex double curvature surface in at least another space between the front and the rear of the electronic device. The at least two physically connected side display areas may be bent in directions so that an acute angle, a right angle or an obtuse angle is formed.

    ELECTRONIC DEVICE COMPRISING SENSOR
    3.
    发明公开

    公开(公告)号:EP4141935A1

    公开(公告)日:2023-03-01

    申请号:EP21797493.0

    申请日:2021-04-27

    摘要: An electronic device may comprise a display panel and a sensor. The display panel may be placed within an internal space of a housing in such a way that the display panel can be seen from the outside. The sensor may be positioned below the display panel. The display panel may comprise a first region and a second region according to the position of the sensor. The display panel may comprise a first pixel circuit driving a first pixel positioned in the first region, and a second pixel circuit driving a second pixel positioned in the second region. At least a portion of a plurality of first switching elements included in the first pixel circuit and a plurality of second switching elements included in the second pixel circuit may have different energy band gaps.

    PROCESSOR AND OPERATING METHOD THEREOF
    5.
    发明公开

    公开(公告)号:EP4411537A1

    公开(公告)日:2024-08-07

    申请号:EP24155338.7

    申请日:2024-02-01

    IPC分类号: G06F9/30 G06F9/46

    摘要: A processor includes a register file, a context controller that, in response to a target interrupt occurring, is configured to determine, a target register that stores new data acquired through each of commands for executing an interrupt service routine (ISR) among the plurality of registers, a write buffer configured to transmit pre-data stored in the target register to a memory, and a flag register configured to store set data including set values indicating whether the new data is stored in each of the registers. The context controller is configured to determine whether to transfer the pre-data to the memory through the write buffer based on the set data.