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1.发明公开INPUT FILTER CIRCUIT FOR A PROGRAMMABLE LOGIC CONTROLLER AND ASSOCIATED METHOD 审中-公开输入滤波电路的逻辑编程控制与相关方法
公开(公告)号：EP1177482A1
公开(公告)日：2002-02-06
申请号：EP00917966.4
申请日：2000-03-15
发明人： BOGGS, Mark, Steven , FULTON, Temple, L. , HAUSMAN, Steve , MCNABB, Gary , MCNUTT, Alan , STIMMEL, Steven, W.
IPC分类号： G05B19/05
CPC分类号： G05B19/054
摘要： A programmable logic controller with enhanced and extended capabilities. A digital input filter implement filters with considerable less logic by simulating the action of a capacitor being driven by a constant current source whose output voltage is sensed by a comparator with a large amount of hysteresis. A pulse catch circuit captures the input pulse even though the update occurs between scan cycles. A pulse output controller includes a hardware pipeline mechanism to allow for smooth, hardware-controlled transitions from wave-form to wave-form. A free port link allows the user to control the port either manually or by operation of a user program. In order to provide higher performance for communication using PPI protocol, the PLC includes a built-in protocol. An n-bit modem protocol ensures data integrity without use of a parity type data integrity system. A hide instruction protects proprietary software by encrypting the sensitive code and decrypting the code during compilation and, thereafter, re-encrypting the code. A system function call allows the user to create and/or download new PLC functions and implement them as PLC operating system functions. An STL status function debugs programs during run-time and while the program is executing. A micro PLC arrangement provides compact size and efficiency.
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2.发明公开
公开(公告)号：EP1177481A1
公开(公告)日：2002-02-06
申请号：EP00917965.6
申请日：2000-03-15
发明人： BOGGS, Mark, Steven , FULTON, Temple, L. , HAUSMAN, Steve , MCNABB, Gary , MCNUTT, Alan , STIMMEL, Steven, W.
IPC分类号： G05B19/05 , G05B19/042
CPC分类号： G05B19/0423 , G05B19/054
摘要： A programmable logic controller with enhanced and extended capabilities. A digital input filter implements filters with considerably less logic by simulating the action of a capacitor being driven by a constant current source whose output voltage is sensed by a comparator with a large amount of hysterisis. A pulse catch circuit captures the input pulse even though the update occurs between scan cycles. A pulse output controller includes a hardware pipeline mechanism to allow for smooth, hardware-controlled transitions from wave-form to wave-form. A free port link allows the user to control the port either manually or by operation of a user program. In order to provide higher performance for communication using PPI protocol, the PLC includes a built-in protocol. An n-bit modem protocol ensures data integrity without use of a parity type data integrity system. A hide instruction protects proprietary software by encrypting the sensitive code and decrypting the code during compilation and, thereafter, reencrypting the code. A system function call allows the user to create and/or download new PLC functions and implement them as PLC operating system functions. An STL status function debugs programs during run-time and while the program is executing. A micro PLC arrangement provides compact size and efficiency.
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公开(公告)号：EP1196838B1
公开(公告)日：2006-05-31
申请号：EP00919819.3
申请日：2000-03-30
发明人： BOGGS, Mark, Steven , FULTON, Temple, L. , HAUSMAN, Steve , MCNABB, Gary , MCNUTT, Alan , STIMMEL, Steven, W.
CPC分类号： G06F11/3636 , G05B19/056 , G06F1/025
摘要： A programmable logic controller with enhanced and extended capabilities. A digital input filter implement filters with considerable less logic by simulating the action of a capacitor being driven by a constant current source whose output voltage is sensed by a comparator with a large amount of hysterisis. A pulse catch circuit captures the input pulse even though the update occurs between scan cycles. A pulse output controller includes a hardware pipeline mechanism to allow for smooth, hardware-controlled transitions from wave-form to wave-form. A free port link allows the user to control the port either manually or by operation of a user program. In order to provide higher performance for communication using PPI protocol, the PLC includes a built-in protocol. An n-bit modem protocol ensures data integrity without use of a parity type data integrity system. A hide instruction protects proprietary software by encrypting the sensitive code and decrypting the code during compilation and, thereafter, re-encrypting the code. A system function call allows the user to create and/or download new PLC functions and implement them as PLC operating system functions. An STL status function debugs programs during run-time and while the program is executing. A micro PLC arrangement provides compact size and efficiency.
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4.发明授权
公开(公告)号：EP1177481B1
公开(公告)日：2004-06-02
申请号：EP00917965.6
申请日：2000-03-15
发明人： BOGGS, Mark, Steven , FULTON, Temple, L. , HAUSMAN, Steve , MCNABB, Gary , MCNUTT, Alan , STIMMEL, Steven, W.
IPC分类号： G05B19/05 , G05B19/042
CPC分类号： G05B19/0423 , G05B19/054
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公开(公告)号：EP1196838A2
公开(公告)日：2002-04-17
申请号：EP00919819.3
申请日：2000-03-30
发明人： BOGGS, Mark, Steven , FULTON, Temple, L. , HAUSMAN, Steve , MCNABB, Gary , MCNUTT, Alan , STIMMEL, Steven, W.
CPC分类号： G06F11/3636 , G05B19/056 , G06F1/025
摘要： A programmable logic controller with enhanced and extended capabilities. A digital input filter implement filters with considerable less logic by simulating the action of a capacitor being driven by a constant current source whose output voltage is sensed by a comparator with a large amount of hysterisis. A pulse catch circuit captures the input pulse even though the update occurs between scan cycles. A pulse output controller includes a hardware pipeline mechanism to allow for smooth, hardware-controlled transitions from wave-form to wave-form. A free port link allows the user to control the port either manually or by operation of a user program. In order to provide higher performance for communication using PPI protocol, the PLC includes a built-in protocol. An n-bit modem protocol ensures data integrity without use of a parity type data integrity system. A hide instruction protects proprietary software by encrypting the sensitive code and decrypting the code during compilation and, thereafter, re-encrypting the code. A system function call allows the user to create and/or download new PLC functions and implement them as PLC operating system functions. An STL status function debugs programs during run-time and while the program is executing. A micro PLC arrangement provides compact size and efficiency.
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