公开(公告)号：EP2961073A1

公开(公告)日：2015-12-30

申请号：EP15177576.4

申请日：2008-11-26

申请人： Sony Corporation

发明人： Yokokawa, Takashi ,  Yamamoto, Makiko ,  Okada, Satoshi ,  Sakai, Lui ,  Ikegaya, Ryoji

IPC分类号： H03M13/11 ,  H03M13/27 ,  H03M13/25 ,  H04L1/00

CPC分类号： H03M13/1165 ,  H03M13/1185 ,  H03M13/255 ,  H03M13/2703 ,  H03M13/2707 ,  H03M13/271 ,  H03M13/6552 ,  H03M13/6555 ,  H04L1/0057

摘要： The present invention relates to column-twist interleaving (24) for LDPC bit interleaved coded modulation in the DVB framework. More specifically, the present invention is directed to a row-column interleaver comprising mb columns and N/mb rows, in which N LDPC code bits are written column-by-column into the interleaver and read row-by-row from the interleaver. For each column, writing may not start at the top of the column but with an offset. The mb code bits of a row are mapped to b symbols of a 2 m QAM signal constellation. Column offset parameters are provided for LDPC codes of length 64800, b=1,2 and m=16 (i.e. 64 kQAM).

摘要翻译： 本发明涉及用于DVB框架中的LDPC比特交织编码调制的列扭转交织（24）。 更具体地说，本发明针对包括mb列和N / mb行的行列交织器，其中N个LDPC码位逐列地写入到交织器中并且从交织器逐行读取。 对于每一列，写入可能不会从列的顶部开始，而是偏移。 一行的mb代码位映射到2 m QAM信号星座的b个符号。 列偏移参数用于长度为64800，b = 1,2和m = 16（即64 kQAM）的LDPC码。

公开(公告)号：EP2290891A3

公开(公告)日：2015-12-30

申请号：EP10171221.4

申请日：2010-07-29

申请人： Sony Corporation

发明人： Goto, Yuken ,  Nagaki, Naoto ,  Okada, Satoshi ,  Nakahara, Kentaro ,  Naniwada, Koji

IPC分类号： H04L27/00 ,  H04L1/20 ,  H04L27/26 ,  H04L1/00

CPC分类号： H04L1/201 ,  H04L1/0054 ,  H04L5/0007 ,  H04L5/0048 ,  H04L27/2656 ,  H04L27/2659

摘要： Disclosed herein is a receiving apparatus, for example for detecting a signal based on the DVB-T2 standard. The apparatus includes a first correlation value computation section for computing a first correlation value between two sections of a received signal, an operation section for performing an Fourier transform of a the received signal, a second correlation value computation section for computing a second correlation value between a sequence of subcarriers of the received signal, a decoding section for computing third correlation values between data associated with a second correlation value above a threshold and a plurality of predefined data items thereby decoding known data having a maximum value of said third correlation values, and a determination section for determining whether the maximum values of said third correlation values is less than a threshold.

摘要翻译： 这里公开了一种接收装置，例如用于基于DVB-T2标准检测信号。 该装置包括：第一相关值计算部分，用于计算接收信号的两个部分之间的第一相关值;操作部分，用于对接收信号进行傅里叶变换;第二相关值计算部分， 接收信号的副载波序列;解码部分，用于计算与阈值以上的第二相关值相关联的数据与多个预定义数据项之间的第三相关值，从而解码具有所述第三相关值的最大值的已知数据;以及 确定部分，用于确定所述第三相关值的最大值是否小于阈值。

公开(公告)号：EP2237430A3

公开(公告)日：2015-09-30

申请号：EP10167468.7

申请日：2008-11-26

申请人： Sony Corporation

发明人： Yokokawa, Takashi ,  Yamamoto, Makiko ,  Okada, Satoshi ,  Ikegaya, Ryoji

IPC分类号： H03M13/11 ,  H03M13/25 ,  H03M13/27 ,  H03M13/03 ,  H04L1/00 ,  H04L27/34 ,  H03M13/29 ,  H03M13/35 ,  H04L27/26 ,  H03M13/15

CPC分类号： H04L27/2647 ,  H03M13/033 ,  H03M13/1165 ,  H03M13/152 ,  H03M13/255 ,  H03M13/2707 ,  H03M13/2906 ,  H03M13/356 ,  H03M13/6552 ,  H03M13/6555

摘要： The present invention relates to a data processing apparatus and a data processing method which can improve the tolerance to errors of data. A demultiplexer 25 replaces, in accordance with an allocation rule for allocating code bits of an LDPC code to symbol bits representative of symbols, mb bits from among the code bits and sets the code bits after the replacement as symbol bits of b symbols. For example, when m is 12 and b is 1, where the i+1th bits from the most significant bit of the 12 × 1 code bits and the 12 × 1 symbol bits of one symbol are represented as bits b i and y i , replacement for allocating, for example, b 0 to y 8 , b 1 to y 0 , b 2 to y 6 , b 3 to y 1 , b 4 to y 4 , b 5 to y 5 , b 6 to y 2 , b 7 to y 3 , b 8 to y 7 , bg to y 10 , b 10 to y 11 and b 11 to y 9 is carried out. The present invention can be applied, for example, to a transmission system for transmitting an LDPC code and so forth.

摘要翻译： 数据处理装置和数据处理方法技术领域本发明涉及能够提高对数据的错误容忍度的数据处理装置和数据处理方法 解复用器25根据用于将LDPC码的代码位分配给代表码元的码元位的分配规则替换码位中的mb个位，并将置换后的码位设置为b个符号的符号位。 例如，当m是12并且b是1时，其中来自12×1码位的最高有效位的第i + 1位和一个符号的12×1符号位被表示为位bi和yi， 例如分配b0至y8，b1至y0，b2至y6，b3至y1，b4至y4，b5至y5，b6至y2，b7至y3，b8至y7，bg至y10，b10至y11和b11 到y9被执行。 例如，本发明可以应用于传输LDPC码等的传输系统。

公开(公告)号：EP2665209B1

公开(公告)日：2017-06-21

申请号：EP13167212.3

申请日：2013-05-10

申请人： Sony Corporation

发明人： Hirayama, Yuichi ,  Okada, Satoshi ,  Ikeda, Tamotsu ,  Kishimoto, Naomichi

IPC分类号： H04H60/19 ,  H04L29/06 ,  H04H60/40 ,  H04N21/418 ,  H04N21/43 ,  H04N21/434 ,  H04N21/436

CPC分类号： H04L69/06 ,  H04H60/19 ,  H04H60/40 ,  H04N21/4181 ,  H04N21/4305 ,  H04N21/4344 ,  H04N21/43607

公开(公告)号：EP2950452A2

公开(公告)日：2015-12-02

申请号：EP15167731.7

申请日：2008-11-26

申请人： Sony Corporation

发明人： Yokokawa, Takashi ,  Yamamoto, Makiko ,  Okada, Satoshi ,  Ikegaya, Ryoji

IPC分类号： H03M13/11 ,  H03M13/25 ,  H03M13/27 ,  H03M13/03 ,  H04L1/00 ,  H04L27/34 ,  H03M13/29 ,  H03M13/35 ,  H04L27/26 ,  H03M13/15

CPC分类号： H04L27/2647 ,  H03M13/033 ,  H03M13/1165 ,  H03M13/152 ,  H03M13/255 ,  H03M13/2707 ,  H03M13/2906 ,  H03M13/356 ,  H03M13/6552 ,  H03M13/6555

摘要： The present application relates to a data processing apparatus and a data processing method which can improve the tolerance to errors of data. A demultiplexer (25) replaces, in accordance with an allocation rule for allocating code bits of an LDPC code to symbol bits representative of symbols, mb bits from among the code bits and sets the code bits after the replacement as symbol bits of b symbols. For example, when m is 12 and b is 1, where the i+1th bits from the most significant bit of the 12 × 1 code bits and the 12 × 1 symbol bits of one symbol are represented as bits b i and y i , replacement for allocating, for example, b 0 to y 8 , b 1 to y 0 , b 2 to y 6 , b 3 to y 1 , b 4 to y 4 , b 5 to y 5 , b 6 to y 2 , b 7 to y 3 , b 8 to y 7 , b 9 to y 10 , b 10 to y 11 and b 11 to y 9 is carried out. The present invention can be applied, for example, to a transmission system for transmitting an LDPC code and so forth as specified in the DVB framework. At the receiving end, a reception apparatus (12) comprises a deinterleaver (53) including a multiplexer (54), wherein a reverse replacement means (1001) reverses the above described allocation and writes the thus obtained code bits into a memory (1002).

摘要翻译： 本申请涉及一种数据处理装置和数据处理方法，其可以提高对数据的误差的容忍度。 解复用器（25）根据用于分配LDPC码的码位的分配规则替换代表码元的符号位，并从代码比特中替换mb比特，并将替换后的码比特设置为b符号的符号比特。 例如，当m为12且b为1时，其中来自12×1码位的最高有效位的第i + 1位和一个符号的12×1符号位表示为位bi和yi，替换为 分配例如b 0〜y 8，b 1〜y 0，b 2〜y 6，b 3〜y 1，b 4〜y 4，b 5〜y 5，b 6〜y 2，b 7〜 y 3，b 8〜y 7，b 9〜y 10，b 10〜y 11，b 11〜y 9。 本发明可以应用于例如在DVB框架中指定的用于发送LDPC码等的传输系统。 在接收端，接收装置（12）包括具有多路复用器（54）的解交织器（53），其中反向替换装置（1001）反转上述分配并将这样获得的码位写入存储器（1002） 。

公开(公告)号：EP2509270A3

公开(公告)日：2014-10-29

申请号：EP12175213.3

申请日：2008-11-18

申请人： Sony Corporation

发明人： Yokokawa, Takashi ,  Yamamoto, Makiko ,  Okada, Satoshi ,  Ikegaya, Ryoji

IPC分类号： H03M13/19 ,  H03M13/11 ,  H03M13/03 ,  H04L1/00 ,  H04L27/34 ,  H04L27/26 ,  H03M13/25 ,  H04L27/36 ,  H03M13/27 ,  H03M13/35

CPC分类号： H04L27/3416 ,  H03M13/036 ,  H03M13/1165 ,  H03M13/255 ,  H03M13/271 ,  H03M13/356 ,  H03M13/6552 ,  H04L1/0057 ,  H04L1/0071 ,  H04L27/3488 ,  H04L27/36

摘要： The invention relates to a decoding apparatus and a decoding method which can improve the tolerance to errors.
Of an LDPC code which is prescribed in the DVB-S.2 and has a code length of 64,800 and an encoding rate of 2/3, mb code bits are replaced, and the code bits after the replacement become symbol bits of b symbols. When m is 8 and b is 2, where the i+1th bit from the most significant bit of 8 × 2 code bits and 8 × 2 symbol bits of two successive symbols are represented by b i and y i , respectively, replacement of allocating b 0 to y 15 , b 1 to y 7 , b 2 to y 1 , b 3 to y 5 , b 4 to y 6 , b 5 to y 13 , b 6 to y 11 , b 7 to y 9 , b 8 to y 8 , b 9 to Y 14 , b 10 to y 12 , b 11 to y 3 , b 12 to y 0 , b 13 to y 10 , b 14 to Y 4 and b 15 to y 2 . The present invention can be applied, for example, to a transmission system for transmitting an LDPC code and so forth.

摘要翻译： 本发明涉及一种数据处理装置和数据处理方法以及可以提高误差容忍度的编码装置和编码方法。 在DVB-S.2中规定的并且具有64,800的码长和2/3的编码速率的LDPC码中，替换mb个码比特，并且替换后的码比特成为b符号的符号比特。 当m为8且b为2时，分别由b 1和y 1分别表示由8×2码位的最高有效位和第2个连续符号的8×2个符号位的第i + 1位， 至y 15，b 1至y 7，b 2至y 1，b 3至y 5，b 4至y 6，b 5至y 13，b 6至y 11，b 7至y 9，b 8至y 8，b 9〜y 14，b 10〜y 12，b 1〜y 3，b 12〜y 0，b 13〜y 10，b 14〜y 4，b 15〜y 2。 本发明可以应用于例如用于发送LDPC码等的传输系统。

公开(公告)号：EP2346221A3

公开(公告)日：2011-09-07

申请号：EP10197237.0

申请日：2010-12-29

申请人： Sony Corporation

发明人： Yokokawa, Takashi ,  Okada, Satoshi

IPC分类号： H04N7/24 ,  H04J3/06 ,  H04L27/26

CPC分类号： H04L25/02 ,  H04L27/26 ,  H04N21/4305

摘要： Disclosed herein is a reception apparatus, including: a reception section configured to receive an OFDM (orthogonal frequency division multiplexed) signal obtained by modulating a common packet sequence configured from a packet common to a plurality of streams and a data packet sequence configured from packets individually unique to the plural streams; a buffer configured to accumulate packets of the common packet sequence and the data packet sequence obtained by demodulating the received OFDM signal; a retaining section configured to retain correction information for correcting out-of-synchronism between the common packet sequence and the data packet sequence obtained from particular packets of the common packet sequence and the data packet sequence upon reading out of the packets accumulated in the buffer; and a correction section configured to correct the out-of-synchronism of the packet which suffers from the out-of-synchronism of the packets based on the correction information retained in the retaining section.

摘要翻译： 在此公开了一种接收设备，包括：接收部分，被配置为接收通过调制由公用于多个流的分组配置的公共分组序列获得的OFDM（正交频分复用）信号和分别由分组配置的数据分组序列 独特的复数流; 缓冲器，被配置为累积公共分组序列的分组和通过解调接收到的OFDM信号而获得的数据分组序列; 保持部分，被配置为在读出缓冲器中累积的分组时保持用于校正公共分组序列与从公共分组序列和数据分组序列的特定分组获得的数据分组序列之间的不同步的校正信息; 以及校正部件，被配置为基于保持部件中保持的校正信息来校正遭受分组的不同步的分组的不同步。

公开(公告)号：EP2346221A2

公开(公告)日：2011-07-20

申请号：EP10197237.0

申请日：2010-12-29

申请人： Sony Corporation

发明人： Yokokawa, Takashi ,  Okada, Satoshi

IPC分类号： H04L25/02 ,  H04L27/26

CPC分类号： H04L25/02 ,  H04L27/26 ,  H04N21/4305

摘要： Disclosed herein is a reception apparatus, including: a reception section configured to receive an OFDM (orthogonal frequency division multiplexed) signal obtained by modulating a common packet sequence configured from a packet common to a plurality of streams and a data packet sequence configured from packets individually unique to the plural streams; a buffer configured to accumulate packets of the common packet sequence and the data packet sequence obtained by demodulating the received OFDM signal; a retaining section configured to retain correction information for correcting out-of-synchronism between the common packet sequence and the data packet sequence obtained from particular packets of the common packet sequence and the data packet sequence upon reading out of the packets accumulated in the buffer; and a correction section configured to correct the out-of-synchronism of the packet which suffers from the out-of-synchronism of the packets based on the correction information retained in the retaining section.

摘要翻译： 这里公开了一种接收装置，包括：接收部分，被配置为接收通过对由多个流公用的分组配置的公共分组序列进行调制而获得的OFDM（正交频分复用）信号和由分组分组配置的数据分组序列 独特的多个流; 缓冲器，被配置为累积通过解调所接收的OFDM信号而获得的公共分组序列和数据分组序列的分组; 保持部，被配置为当读出在所述缓冲器中累积的分组时，保留用于校正所述公共分组序列和从所述公共分组序列和所述数据分组序列的特定分组获得的数据分组序列之间的不同步的校正信息; 以及校正部，被配置为基于保留在保持部中的校正信息来校正受到分组的不同步的分组的不同步。

公开(公告)号：EP2343860A2

公开(公告)日：2011-07-13

申请号：EP10195140.8

申请日：2010-12-15

申请人： Sony Corporation

发明人： Yokokawa, Takashi ,  Okada, Satoshi ,  Honda, Tomoharu

IPC分类号： H04L27/26

CPC分类号： H04L27/2656 ,  H04H60/11 ,  H04L27/2602 ,  H04L27/2666 ,  H04N21/4382 ,  H04N21/6112

摘要： Disclosed herein is a reception apparatus, including: a reception section adapted to receive an OFDM (Orthogonal Frequency Division Multiplexing) signal obtained by modulating a first frame configured so as to include packets of a common packet sequence configured from a packet common to a plurality of streams and a second frame configured so as to include packets of a data packet sequence configured from packets individually unique to the plural streams; an acquisition section (12) adapted to acquire specification information for specifying a combination of a first frame and a second frame obtained by demodulating the received OFDM signal; and a detection section (13) adapted to detect a combination of a packet of the common packet sequence which configures the first frame and a packet of the data packet sequence which configures the second frame, whose combination is specified based on the acquired specification information.

摘要翻译： 本发明公开了一种接收装置，包括：接收部件，用于接收通过对第一帧进行调制而获得的OFDM（正交频分复用）信号，该第一帧被配置为包括由多个公共分组共享的分组构成的公共分组序列 流和第二帧，所述第二帧被配置为包括由对所述多个流分别独有的分组配置的数据分组序列的分组; 获取部分（12），适用于获取用于指定通过解调所接收的OFDM信号而获得的第一帧和第二帧的组合的指定信息; 以及检测部分，用于检测基于所获取的规格信息指定其组合的构成第一帧的公共分组序列的分组与组成第二帧的数据分组序列的分组的组合。

公开(公告)号：EP2290891A2

公开(公告)日：2011-03-02

申请号：EP10171221.4

申请日：2010-07-29

申请人： Sony Corporation

发明人： Goto, Yuken ,  Nagaki, Naoto ,  Okada, Satoshi ,  Nakahara, Kentaro ,  Naniwada, Koji

IPC分类号： H04L27/00

CPC分类号： H04L1/201 ,  H04L1/0054 ,  H04L5/0007 ,  H04L5/0048 ,  H04L27/2656 ,  H04L27/2659

摘要： Disclosed herein is a receiving apparatus, for example for detecting a signal based on the DVB-T2 standard. The apparatus includes a first correlation value computation section for computing a first correlation value between two sections of a received signal, an operation section for performing an Fourier transform of a the received signal, a second correlation value computation section for computing a second correlation value between a sequence of subcarriers of the received signal, a decoding section for computing third correlation values between data associated with a second correlation value above a threshold and a plurality of predefined data items thereby decoding known data having a maximum value of said third correlation values, and a determination section for determining whether the maximum values of said third correlation values is less than a threshold.

摘要翻译： 本文公开了一种接收装置，例如用于基于DVB-T2标准检测信号。 该装置包括第一相关值计算部分，用于计算接收信号的两个部分之间的第一相关值，用于执行接收信号的傅立叶变换的操作部分，第二相关值计算部分，用于计算第二相关值， 接收信号的子载波序列，用于计算与高于阈值的第二相关值相关联的数据与多个预定义数据项之间的第三相关值的解码部分，从而解码具有所述第三相关值的最大值的已知数据，以及 确定部分，用于确定所述第三相关值的最大值是否小于阈值。