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公开(公告)号:EP4164982A1
公开(公告)日:2023-04-19
申请号:EP21735338.2
申请日:2021-06-16
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公开(公告)号:EP4298669A1
公开(公告)日:2024-01-03
申请号:EP22712011.0
申请日:2022-02-17
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公开(公告)号:EP4373233A2
公开(公告)日:2024-05-22
申请号:EP24168258.2
申请日:2022-02-18
IPC分类号: H05K7/20
CPC分类号: F28F2013/00620130101 , H05K7/20481 , H05K7/20372 , H01L23/3738
摘要: An inventive embodiment comprises a thermalization arrangement at cryogenic temperatures. The arrangement comprises a dielectric substrate (2) layer on which substrate a device/s or component/s (1) are positionable. A heat sink component (4) is attached on another side of the substrate. The arrangement further comprises a conductive layer (5) between the substrate layer (2) and the heat sink component (4). A joint between the substrate layer (2) and the conductive layer (5) has minimal thermal boundary resistance. Another joint between the conductive layer (5) and the cooling heat sink layer (4) is electrically conductive.
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公开(公告)号:EP4373233A3
公开(公告)日:2024-08-14
申请号:EP24168258.2
申请日:2022-02-18
IPC分类号: H05K7/20
CPC分类号: F28F2013/00620130101 , H05K7/20481 , H05K7/20372 , H01L23/3738
摘要: An inventive embodiment comprises a thermalization arrangement at cryogenic temperatures. The arrangement comprises a dielectric substrate (2) layer on which substrate a device/s or component/s (1) are positionable. A heat sink component (4) is attached on another side of the substrate. The arrangement further comprises a conductive layer (5) between the substrate layer (2) and the heat sink component (4). A joint between the substrate layer (2) and the conductive layer (5) has minimal thermal boundary resistance. Another joint between the conductive layer (5) and the cooling heat sink layer (4) is electrically conductive.
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公开(公告)号:EP4165779A1
公开(公告)日:2023-04-19
申请号:EP21735337.4
申请日:2021-06-16
发明人: NISSILÄ, Jaani , KEMPPINEN, Antti
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